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src/sim/m32r ChangeLog Makefile.in m32r-sim.h ...
- From: cagney at sources dot redhat dot com
- To: gdb-cvs at sources dot redhat dot com
- Date: 7 Dec 2003 02:27:45 -0000
- Subject: src/sim/m32r ChangeLog Makefile.in m32r-sim.h ...
CVSROOT: /cvs/src
Module name: src
Changes by: cagney@sourceware.org 2003-12-07 02:27:45
Modified files:
sim/m32r : ChangeLog Makefile.in m32r-sim.h m32r.c
sim-if.c sim-main.h traps.c
Log message:
2003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* Makefile.in : Add new machine m32r2.
* m32r2.c : New file for m32r2.
* mloop2.in : Ditto
* model2.c : Ditto
* sem2-switch.c : Ditto
* m32r-sim.h : Add EVB register.
* sim-if.h : Ditto
* sim-main.h : Ditto
* traps.c : Ditto
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/ChangeLog.diff?cvsroot=src&r1=1.15&r2=1.16
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/Makefile.in.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/m32r-sim.h.diff?cvsroot=src&r1=1.1.1.3&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/m32r.c.diff?cvsroot=src&r1=1.1.1.2&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/sim-if.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/sim-main.h.diff?cvsroot=src&r1=1.1.1.2&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/traps.c.diff?cvsroot=src&r1=1.1.1.3&r2=1.2