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src/sim/m68hc11 ChangeLog m68hc11_sim.c sim-ma ...


CVSROOT:	/cvs/src
Module name:	src
Changes by:	ciceron@sources.redhat.com	2002-08-13 00:46:10

Modified files:
	sim/m68hc11    : ChangeLog m68hc11_sim.c sim-main.h gencode.c 
	                 interp.c 

Log message:
	* m68hc11_sim.c (cpu_special): Handle call and rtc instructions.
	* sim-main.h (M6812_CALL_INDIRECT): Add to enum.
	(m6811_regs): Add page register.
	(cpu_set_page, cpu_get_page): New macros.
	(phys_to_virt): New function.
	(cpu_get_indexed_operand_addr, cpu_return): Declare.
	* gencode.c: Identify indirect addressing mode for call and fix daa.
	(gen_function_entry): New param to tell if src8/dst8 locals are
	necessary.
	(gen_interpreter): Use it to avoid generation of unused variables.
	* interp.c (sim_fetch_register): Allow to read page register; page
	register, A, B and CCR are only 1 byte wide.
	(sim_store_register): Likewise for writing.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m68hc11/ChangeLog.diff?cvsroot=src&r1=1.23&r2=1.24
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m68hc11/m68hc11_sim.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m68hc11/sim-main.h.diff?cvsroot=src&r1=1.8&r2=1.9
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m68hc11/gencode.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m68hc11/interp.c.diff?cvsroot=src&r1=1.8&r2=1.9


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