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Thanks. So this seems slightly different from how we do things with ptrace/proc where we can have multiple different register banks (for floating point, extended floating point and control/debug registers). We might be able to always just use the USR address space to get at all of those together in one go (I don't actually know why we don't do that, or why ptrace provides different ways to access the same register sets).
If we can match up the raw memory for each register bank between
ptrace/proc and core files from Task that would be ideal. Then the Isa
can just do the getRegisterByName() mapping. I'll watch your rewrite of
the core file stuff and see if this makes things easier and clearer (I
guess it will).
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