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[SCM] master: frysk-core/frysk/bank/ChangeLog

From: cagney at sourceware dot org
To: frysk-cvs at sourceware dot org
Date: 20 Dec 2007 00:56:45 -0000
Subject: [SCM] master: frysk-core/frysk/bank/ChangeLog
Reply-to: frysk at sourceware dot org
The branch, master has been updated
       via  e590d60fba9c0de3ba354051c5b4b7b6cf41e198 (commit)
      from  c660d1e1c83d3f354d39d95bb54a1e2dc79ed64f (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email.

- Log -----------------------------------------------------------------
commit e590d60fba9c0de3ba354051c5b4b7b6cf41e198
Author: Andrew Cagney <cagney@redhat.com>
Date:   Wed Dec 19 19:47:07 2007 -0500

    frysk-core/frysk/bank/ChangeLog
    2007-12-19  Andrew Cagney  <cagney@redhat.com>
    
    	* LinuxIA32RegisterBanks.java: New, from X86BankRegisters.java.
    	* LinuxX8664RegisterBanks.java: New, from X86BankRegisters.java.
    	* LinuxPPCRegisterBanks.java: New, from PPCBankRegisters.java.
    	* RegisterBank.java: New.
    	* RegisterEntry.java: New.

-----------------------------------------------------------------------

Summary of changes:
 frysk-core/frysk/bank/ChangeLog                    |    6 +
 frysk-core/frysk/bank/LinuxIA32RegisterBanks.java  |  108 ++++++++++
 frysk-core/frysk/bank/LinuxPPCRegisterBanks.java   |  219 ++++++++++++++++++++
 frysk-core/frysk/bank/LinuxX8664RegisterBanks.java |  123 +++++++++++
 .../{isa/ISAMap.java => bank/RegisterBank.java}    |   61 +++---
 .../bank/{BankRegister.java => RegisterEntry.java} |  105 ++++++----
 6 files changed, 551 insertions(+), 71 deletions(-)
 create mode 100644 frysk-core/frysk/bank/LinuxIA32RegisterBanks.java
 create mode 100644 frysk-core/frysk/bank/LinuxPPCRegisterBanks.java
 create mode 100644 frysk-core/frysk/bank/LinuxX8664RegisterBanks.java
 copy frysk-core/frysk/{isa/ISAMap.java => bank/RegisterBank.java} (67%)
 copy frysk-core/frysk/bank/{BankRegister.java => RegisterEntry.java} (63%)

First 500 lines of diff:
diff --git a/frysk-core/frysk/bank/ChangeLog b/frysk-core/frysk/bank/ChangeLog
index 80d5375..f0f2407 100644
--- a/frysk-core/frysk/bank/ChangeLog
+++ b/frysk-core/frysk/bank/ChangeLog
@@ -1,5 +1,11 @@
 2007-12-19  Andrew Cagney  <cagney@redhat.com>
 
+	* LinuxIA32RegisterBanks.java: New, from X86BankRegisters.java.
+	* LinuxX8664RegisterBanks.java: New, from X86BankRegisters.java.
+	* LinuxPPCRegisterBanks.java: New, from PPCBankRegisters.java.
+	* RegisterBank.java: New.
+	* RegisterEntry.java: New.
+
 	* BankRegister.java: Move to here from frysk.proc.
 	* BankRegisterMap.java: Ditto.
 	* IndirectBankRegisterMap.java: Ditto.
diff --git a/frysk-core/frysk/bank/LinuxIA32RegisterBanks.java b/frysk-core/frysk/bank/LinuxIA32RegisterBanks.java
new file mode 100644
index 0000000..4a3e1f4
--- /dev/null
+++ b/frysk-core/frysk/bank/LinuxIA32RegisterBanks.java
@@ -0,0 +1,108 @@
+// This file is part of the program FRYSK.
+//
+// Copyright 2006, 2007, Red Hat Inc.
+//
+// FRYSK is free software; you can redistribute it and/or modify it
+// under the terms of the GNU General Public License as published by
+// the Free Software Foundation; version 2 of the License.
+//
+// FRYSK is distributed in the hope that it will be useful, but
+// WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with FRYSK; if not, write to the Free Software Foundation,
+// Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+// 
+// In addition, as a special exception, Red Hat, Inc. gives You the
+// additional right to link the code of FRYSK with code not covered
+// under the GNU General Public License ("Non-GPL Code") and to
+// distribute linked combinations including the two, subject to the
+// limitations in this paragraph. Non-GPL Code permitted under this
+// exception must only link to the code of FRYSK through those well
+// defined interfaces identified in the file named EXCEPTION found in
+// the source code files (the "Approved Interfaces"). The files of
+// Non-GPL Code may instantiate templates or use macros or inline
+// functions from the Approved Interfaces without causing the
+// resulting work to be covered by the GNU General Public
+// License. Only Red Hat, Inc. may make changes or additions to the
+// list of Approved Interfaces. You must obey the GNU General Public
+// License in all respects for all of the FRYSK code and other code
+// used in conjunction with FRYSK except the Non-GPL Code covered by
+// this exception. If you modify this file, you may extend this
+// exception to your version of the file, but you are not obligated to
+// do so. If you do not wish to provide this exception without
+// modification, you must delete this exception statement from your
+// version and license this file solely under the GPL without
+// exception.
+
+package frysk.bank;
+
+import frysk.isa.IA32Registers;
+import frysk.isa.X87Registers;
+
+public class LinuxIA32RegisterBanks {
+    
+    public static final RegisterBank GENERAL_REGISTERS = new RegisterBank()
+	.add(new RegisterEntry(24, 4,IA32Registers.EAX))
+	.add(new RegisterEntry(0, 4, IA32Registers.EBX))
+	.add(new RegisterEntry(4, 4, IA32Registers.ECX))
+	.add(new RegisterEntry(8, 4, IA32Registers.EDX))
+	.add(new RegisterEntry(12, 4, IA32Registers.ESI))
+	.add(new RegisterEntry(16, 4, IA32Registers.EDI))
+	.add(new RegisterEntry(20, 4, IA32Registers.EBP))
+	.add(new RegisterEntry(52, 4, IA32Registers.CS))
+	.add(new RegisterEntry(28, 4, IA32Registers.DS))
+	.add(new RegisterEntry(32, 4, IA32Registers.ES))
+	.add(new RegisterEntry(36, 4, IA32Registers.FS))
+	.add(new RegisterEntry(40, 4, IA32Registers.GS))
+	.add(new RegisterEntry(64, 4, IA32Registers.SS))
+	.add(new RegisterEntry(44, 4, IA32Registers.ORIG_EAX))
+	.add(new RegisterEntry(48, 4, IA32Registers.EIP))
+	.add(new RegisterEntry(56, 4, IA32Registers.EFLAGS))
+	.add(new RegisterEntry(60, 4, IA32Registers.ESP))
+	;
+    
+    public static final RegisterBank FLOATING_POINT_REGISTERS = new RegisterBank()
+    //Get all FP registers from FXSAVE area.
+	.add(new RegisterEntry(0x00, 2, X87Registers.FCW))
+	.add(new RegisterEntry(0x02, 2, X87Registers.FSW))
+	.add(new RegisterEntry(0x04, 1, X87Registers.FTW))
+	.add(new RegisterEntry(0x06, 2, X87Registers.FOP))
+	.add(new RegisterEntry(0x08, 4, X87Registers.EIP))
+	.add(new RegisterEntry(0x0c, 2, X87Registers.CS))
+	.add(new RegisterEntry(0x10, 4, X87Registers.DP))
+	.add(new RegisterEntry(0x14, 2, X87Registers.DS))
+	.add(new RegisterEntry(0x18, 2, X87Registers.MXCSR))
+	.add(new RegisterEntry(0x1c, 2, X87Registers.MXCSR_MASK))
+	.add(new RegisterEntry(0x20, 10, X87Registers.ST0))
+	.add(new RegisterEntry(0x30, 10, X87Registers.ST1))
+	.add(new RegisterEntry(0x40, 10, X87Registers.ST2))
+	.add(new RegisterEntry(0x50, 10, X87Registers.ST3))
+	.add(new RegisterEntry(0x60, 10, X87Registers.ST4))
+	.add(new RegisterEntry(0x70, 10, X87Registers.ST5))
+	.add(new RegisterEntry(0x80, 10, X87Registers.ST6))
+	.add(new RegisterEntry(0x90, 10, X87Registers.ST7))
+	.add(new RegisterEntry(0xa0, 16, X87Registers.XMM0))
+	.add(new RegisterEntry(0xb0, 16, X87Registers.XMM1))
+	.add(new RegisterEntry(0xc0, 16, X87Registers.XMM2))
+	.add(new RegisterEntry(0xd0, 16, X87Registers.XMM3))
+	.add(new RegisterEntry(0xe0, 16, X87Registers.XMM4))
+	.add(new RegisterEntry(0xf0, 16, X87Registers.XMM5))
+	.add(new RegisterEntry(0x100, 16, X87Registers.XMM6))
+	.add(new RegisterEntry(0x110, 16, X87Registers.XMM7))
+	;
+    
+    public static RegisterBank DEBUG_REGISTERS = new RegisterBank()
+	.add(new RegisterEntry(252, 4, IA32Registers.D0))
+	.add(new RegisterEntry(256, 4, IA32Registers.D1))
+	.add(new RegisterEntry(260, 4, IA32Registers.D2))
+	.add(new RegisterEntry(264, 4, IA32Registers.D3))
+	.add(new RegisterEntry(268, 4, IA32Registers.D4))
+	.add(new RegisterEntry(272, 4, IA32Registers.D5))
+	.add(new RegisterEntry(276, 4, IA32Registers.D6))
+	.add(new RegisterEntry(280, 4, IA32Registers.D7))
+	;
+
+}
diff --git a/frysk-core/frysk/bank/LinuxPPCRegisterBanks.java b/frysk-core/frysk/bank/LinuxPPCRegisterBanks.java
new file mode 100644
index 0000000..1b98f18
--- /dev/null
+++ b/frysk-core/frysk/bank/LinuxPPCRegisterBanks.java
@@ -0,0 +1,219 @@
+// This file is part of the program FRYSK.
+//
+// Copyright 2006, 2007 IBM Corp.
+// Copyright 2007 Red Hat Inc.
+// 
+// Contributed by
+// Jose Flavio Aguilar Paulino (joseflavio@gmail.com)
+//
+// FRYSK is free software; you can redistribute it and/or modify it
+// under the terms of the GNU General Public License as published by
+// the Free Software Foundation; version 2 of the License.
+//
+// FRYSK is distributed in the hope that it will be useful, but
+// WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with FRYSK; if not, write to the Free Software Foundation,
+// Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// In addition, as a special exception, Red Hat, Inc. gives You the
+// additional right to link the code of FRYSK with code not covered
+// under the GNU General Public License ("Non-GPL Code") and to
+// distribute linked combinations including the two, subject to the
+// limitations in this paragraph. Non-GPL Code permitted under this
+// exception must only link to the code of FRYSK through those well
+// defined interfaces identified in the file named EXCEPTION found in
+// the source code files (the "Approved Interfaces"). The files of
+// Non-GPL Code may instantiate templates or use macros or inline
+// functions from the Approved Interfaces without causing the
+// resulting work to be covered by the GNU General Public
+// License. Only Red Hat, Inc. may make changes or additions to the
+// list of Approved Interfaces. You must obey the GNU General Public
+// License in all respects for all of the FRYSK code and other code
+// used in conjunction with FRYSK except the Non-GPL Code covered by
+// this exception. If you modify this file, you may extend this
+// exception to your version of the file, but you are not obligated to
+// do so. If you do not wish to provide this exception without
+// modification, you must delete this exception statement from your
+// version and license this file solely under the GPL without
+// exception.
+
+package frysk.bank;
+
+import frysk.isa.PPC32Registers;
+import frysk.isa.PPC64Registers;
+
+public class LinuxPPCRegisterBanks {
+
+    public static final RegisterBank PPC32BE = new RegisterBank()
+	.add(new RegisterEntry(0, 4, PPC32Registers.GPR0))
+	.add(new RegisterEntry(4, 4, PPC32Registers.GPR1))
+	.add(new RegisterEntry(8, 4, PPC32Registers.GPR2))
+	.add(new RegisterEntry(12, 4, PPC32Registers.GPR3))
+	.add(new RegisterEntry(16, 4, PPC32Registers.GPR4))
+	.add(new RegisterEntry(20, 4, PPC32Registers.GPR5))
+	.add(new RegisterEntry(24, 4, PPC32Registers.GPR6))
+	.add(new RegisterEntry(28, 4, PPC32Registers.GPR7))
+	.add(new RegisterEntry(32, 4, PPC32Registers.GPR8))
+	.add(new RegisterEntry(36, 4, PPC32Registers.GPR9))
+	.add(new RegisterEntry(40, 4, PPC32Registers.GPR10))
+	.add(new RegisterEntry(44, 4, PPC32Registers.GPR11))
+	.add(new RegisterEntry(48, 4, PPC32Registers.GPR12))
+	.add(new RegisterEntry(52, 4, PPC32Registers.GPR13))
+	.add(new RegisterEntry(56, 4, PPC32Registers.GPR14))
+	.add(new RegisterEntry(60, 4, PPC32Registers.GPR15))
+	.add(new RegisterEntry(64, 4, PPC32Registers.GPR16))
+	.add(new RegisterEntry(68, 4, PPC32Registers.GPR17))
+	.add(new RegisterEntry(72, 4, PPC32Registers.GPR18))
+	.add(new RegisterEntry(76, 4, PPC32Registers.GPR19))
+	.add(new RegisterEntry(80, 4, PPC32Registers.GPR20))
+	.add(new RegisterEntry(84, 4, PPC32Registers.GPR21))
+	.add(new RegisterEntry(88, 4, PPC32Registers.GPR22))
+	.add(new RegisterEntry(92, 4, PPC32Registers.GPR23))
+	.add(new RegisterEntry(96, 4, PPC32Registers.GPR24))
+	.add(new RegisterEntry(100, 4, PPC32Registers.GPR25))
+	.add(new RegisterEntry(104, 4, PPC32Registers.GPR26))
+	.add(new RegisterEntry(108, 4, PPC32Registers.GPR27))
+	.add(new RegisterEntry(112, 4, PPC32Registers.GPR28))
+	.add(new RegisterEntry(116, 4, PPC32Registers.GPR29))
+	.add(new RegisterEntry(120, 4, PPC32Registers.GPR30))
+	.add(new RegisterEntry(124, 4, PPC32Registers.GPR31))
+	.add(new RegisterEntry(128, 4, PPC32Registers.NIP)) //Fixme: PC I belive
+	.add(new RegisterEntry(132, 4, PPC32Registers.MSR))
+	.add(new RegisterEntry(136, 4, PPC32Registers.ORIGR3))
+	.add(new RegisterEntry(140, 4, PPC32Registers.CTR))
+	.add(new RegisterEntry(144, 4, PPC32Registers.LR))
+	.add(new RegisterEntry(148, 4, PPC32Registers.XER))
+	.add(new RegisterEntry(152, 4, PPC32Registers.CCR))
+	.add(new RegisterEntry(156, 4, PPC32Registers.MQ))
+	.add(new RegisterEntry(160, 4, PPC32Registers.TRAP))
+	.add(new RegisterEntry(164, 4, PPC32Registers.DAR))
+	.add(new RegisterEntry(168, 4, PPC32Registers.DSISR))
+	.add(new RegisterEntry(172, 4, PPC32Registers.RESULT))
+	.add(new RegisterEntry(192, 8, PPC32Registers.FPR0)) // 48*4
+	.add(new RegisterEntry(200, 8, PPC32Registers.FPR1))
+	.add(new RegisterEntry(208, 8, PPC32Registers.FPR2))
+	.add(new RegisterEntry(216, 8, PPC32Registers.FPR3))
+	.add(new RegisterEntry(224, 8, PPC32Registers.FPR4))
+	.add(new RegisterEntry(232, 8, PPC32Registers.FPR5))
+	.add(new RegisterEntry(240, 8, PPC32Registers.FPR6))
+	.add(new RegisterEntry(248, 8, PPC32Registers.FPR7))
+	.add(new RegisterEntry(256, 8, PPC32Registers.FPR8))
+	.add(new RegisterEntry(264, 8, PPC32Registers.FPR9))
+	.add(new RegisterEntry(272, 8, PPC32Registers.FPR10))
+	.add(new RegisterEntry(280, 8, PPC32Registers.FPR11))
+	.add(new RegisterEntry(288, 8, PPC32Registers.FPR12))
+	.add(new RegisterEntry(296, 8, PPC32Registers.FPR13))
+	.add(new RegisterEntry(304, 8, PPC32Registers.FPR14))
+	.add(new RegisterEntry(312, 8, PPC32Registers.FPR15))
+	.add(new RegisterEntry(320, 8, PPC32Registers.FPR16))
+	.add(new RegisterEntry(328, 8, PPC32Registers.FPR17))
+	.add(new RegisterEntry(336, 8, PPC32Registers.FPR18))
+	.add(new RegisterEntry(344, 8, PPC32Registers.FPR19))
+	.add(new RegisterEntry(352, 8, PPC32Registers.FPR20))
+	.add(new RegisterEntry(360, 8, PPC32Registers.FPR21))
+	.add(new RegisterEntry(368, 8, PPC32Registers.FPR22))
+	.add(new RegisterEntry(376, 8, PPC32Registers.FPR23))
+	.add(new RegisterEntry(384, 8, PPC32Registers.FPR24))
+	.add(new RegisterEntry(392, 8, PPC32Registers.FPR25))
+	.add(new RegisterEntry(400, 8, PPC32Registers.FPR26))
+	.add(new RegisterEntry(408, 8, PPC32Registers.FPR27))
+	.add(new RegisterEntry(416, 8, PPC32Registers.FPR28))
+	.add(new RegisterEntry(424, 8, PPC32Registers.FPR29))
+	.add(new RegisterEntry(432, 8, PPC32Registers.FPR30))
+	.add(new RegisterEntry(440, 8, PPC32Registers.FPR31))
+	//There is a pad of 4 bytes before the FPSCR reg
+	.add(new RegisterEntry(452, 4, PPC32Registers.FPSCR)) //(PT_FPR0 + 2*32 + 1)
+	;
+
+    public static final RegisterBank PPC64BE = new RegisterBank()
+	.add(new RegisterEntry(0, 8, PPC64Registers.GPR0))
+	.add(new RegisterEntry(8, 8, PPC64Registers.GPR1))
+	.add(new RegisterEntry(16, 8, PPC64Registers.GPR2))
+	.add(new RegisterEntry(24, 8, PPC64Registers.GPR3))
+	.add(new RegisterEntry(32, 8, PPC64Registers.GPR4))
+	.add(new RegisterEntry(40, 8, PPC64Registers.GPR5))
+	.add(new RegisterEntry(48, 8, PPC64Registers.GPR6))
+	.add(new RegisterEntry(56, 8, PPC64Registers.GPR7))
+	.add(new RegisterEntry(64, 8, PPC64Registers.GPR8))
+	.add(new RegisterEntry(72, 8, PPC64Registers.GPR9))
+	.add(new RegisterEntry(80, 8, PPC64Registers.GPR10))
+	.add(new RegisterEntry(88, 8, PPC64Registers.GPR11))
+	.add(new RegisterEntry(96, 8, PPC64Registers.GPR12))
+	.add(new RegisterEntry(104, 8, PPC64Registers.GPR13))
+	.add(new RegisterEntry(112, 8, PPC64Registers.GPR14))
+	.add(new RegisterEntry(120, 8, PPC64Registers.GPR15))
+	.add(new RegisterEntry(128, 8, PPC64Registers.GPR16))
+	.add(new RegisterEntry(136, 8, PPC64Registers.GPR17))
+	.add(new RegisterEntry(144, 8, PPC64Registers.GPR18))
+	.add(new RegisterEntry(152, 8, PPC64Registers.GPR19))
+	.add(new RegisterEntry(160, 8, PPC64Registers.GPR20))
+	.add(new RegisterEntry(168, 8, PPC64Registers.GPR21))
+	.add(new RegisterEntry(176, 8, PPC64Registers.GPR22))
+	.add(new RegisterEntry(184, 8, PPC64Registers.GPR23))
+	.add(new RegisterEntry(192, 8, PPC64Registers.GPR24))
+	.add(new RegisterEntry(200, 8, PPC64Registers.GPR25))
+	.add(new RegisterEntry(208, 8, PPC64Registers.GPR26))
+	.add(new RegisterEntry(216, 8, PPC64Registers.GPR27))
+	.add(new RegisterEntry(224, 8, PPC64Registers.GPR28))
+	.add(new RegisterEntry(232, 8, PPC64Registers.GPR29))
+	.add(new RegisterEntry(240, 8, PPC64Registers.GPR30))
+	.add(new RegisterEntry(248, 8, PPC64Registers.GPR31))
+	.add(new RegisterEntry(256, 8, PPC64Registers.NIP))
+	.add(new RegisterEntry(264, 8, PPC64Registers.MSR)) //in gdb: .ps_offset = 264
+	.add(new RegisterEntry(272, 8, PPC64Registers.ORIGR3))
+	.add(new RegisterEntry(280, 8, PPC64Registers.CTR))
+	.add(new RegisterEntry(288, 8, PPC64Registers.LR))
+	.add(new RegisterEntry(296, 8, PPC64Registers.XER))
+	.add(new RegisterEntry(304, 8, PPC64Registers.CCR))
+	.add(new RegisterEntry(312, 8, PPC64Registers.SOFTE))
+	.add(new RegisterEntry(320, 8, PPC64Registers.TRAP))
+	.add(new RegisterEntry(328, 8, PPC64Registers.DAR))
+	.add(new RegisterEntry(336, 8, PPC64Registers.DSISR))
+	.add(new RegisterEntry(344, 8, PPC64Registers.RESULT))
+	.add(new RegisterEntry(384, 8, PPC64Registers.FPR0)) //PT_FPR0 48 
+	.add(new RegisterEntry(392, 8, PPC64Registers.FPR1))
+	.add(new RegisterEntry(400, 8, PPC64Registers.FPR2))
+	.add(new RegisterEntry(408, 8, PPC64Registers.FPR3))
+	.add(new RegisterEntry(416, 8, PPC64Registers.FPR4))
+	.add(new RegisterEntry(424, 8, PPC64Registers.FPR5))
+	.add(new RegisterEntry(432, 8, PPC64Registers.FPR6))
+	.add(new RegisterEntry(440, 8, PPC64Registers.FPR7))
+	.add(new RegisterEntry(448, 8, PPC64Registers.FPR8))
+	.add(new RegisterEntry(456, 8, PPC64Registers.FPR9))
+	.add(new RegisterEntry(464, 8, PPC64Registers.FPR10))
+	.add(new RegisterEntry(472, 8, PPC64Registers.FPR11))
+	.add(new RegisterEntry(480, 8, PPC64Registers.FPR12))
+	.add(new RegisterEntry(488, 8, PPC64Registers.FPR13))
+	.add(new RegisterEntry(496, 8, PPC64Registers.FPR14))
+	.add(new RegisterEntry(504, 8, PPC64Registers.FPR15))
+	.add(new RegisterEntry(512, 8, PPC64Registers.FPR16))
+	.add(new RegisterEntry(520, 8, PPC64Registers.FPR17))
+	.add(new RegisterEntry(528, 8, PPC64Registers.FPR18))
+	.add(new RegisterEntry(536, 8, PPC64Registers.FPR19))
+	.add(new RegisterEntry(544, 8, PPC64Registers.FPR20))
+	.add(new RegisterEntry(552, 8, PPC64Registers.FPR21))
+	.add(new RegisterEntry(560, 8, PPC64Registers.FPR22))
+	.add(new RegisterEntry(568, 8, PPC64Registers.FPR23))
+	.add(new RegisterEntry(576, 8, PPC64Registers.FPR24))
+	.add(new RegisterEntry(584, 8, PPC64Registers.FPR25))
+	.add(new RegisterEntry(592, 8, PPC64Registers.FPR26))
+	.add(new RegisterEntry(600, 8, PPC64Registers.FPR27))
+	.add(new RegisterEntry(608, 8, PPC64Registers.FPR28))
+	.add(new RegisterEntry(616, 8, PPC64Registers.FPR29))
+	.add(new RegisterEntry(624, 8, PPC64Registers.FPR30))
+	.add(new RegisterEntry(632, 8, PPC64Registers.FPR31))
+	.add(new RegisterEntry(640, 4, PPC64Registers.FPSCR))
+	// Fixme: need to implement altivec registers
+	// Vector Registers are 128 bit wide
+	//.add(new BankRegister(0, 656, 16, PPC64Registers.VR0)) PT_VR0 82
+	//...
+	//.add(new BankRegister(0, 1152, 16, PPC64Registers.V31)) PT_VR0 + 31*2), index 148
+	//Need to put a 8 bytes pad here, because VSCR is 8 byte wide only 
+	.add(new RegisterEntry(1176, 8, PPC64Registers.VSCR)) // PT_VSCR (PT_VR0 + 32*2 + 1), index 147
+	.add(new RegisterEntry(1184, 8, PPC64Registers.VRSAVE)); // PT_VRSAVE (PT_VR0 + 33*2), index 148
+
+}
diff --git a/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java b/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java
new file mode 100644
index 0000000..20758ae
--- /dev/null
+++ b/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java
@@ -0,0 +1,123 @@
+// This file is part of the program FRYSK.
+//
+// Copyright 2006, 2007, Red Hat Inc.
+//
+// FRYSK is free software; you can redistribute it and/or modify it
+// under the terms of the GNU General Public License as published by
+// the Free Software Foundation; version 2 of the License.
+//
+// FRYSK is distributed in the hope that it will be useful, but
+// WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with FRYSK; if not, write to the Free Software Foundation,
+// Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+// 
+// In addition, as a special exception, Red Hat, Inc. gives You the
+// additional right to link the code of FRYSK with code not covered
+// under the GNU General Public License ("Non-GPL Code") and to
+// distribute linked combinations including the two, subject to the
+// limitations in this paragraph. Non-GPL Code permitted under this
+// exception must only link to the code of FRYSK through those well
+// defined interfaces identified in the file named EXCEPTION found in
+// the source code files (the "Approved Interfaces"). The files of
+// Non-GPL Code may instantiate templates or use macros or inline
+// functions from the Approved Interfaces without causing the
+// resulting work to be covered by the GNU General Public
+// License. Only Red Hat, Inc. may make changes or additions to the
+// list of Approved Interfaces. You must obey the GNU General Public
+// License in all respects for all of the FRYSK code and other code
+// used in conjunction with FRYSK except the Non-GPL Code covered by
+// this exception. If you modify this file, you may extend this
+// exception to your version of the file, but you are not obligated to
+// do so. If you do not wish to provide this exception without
+// modification, you must delete this exception statement from your
+// version and license this file solely under the GPL without
+// exception.
+
+package frysk.bank;
+
+import frysk.isa.X8664Registers;
+import frysk.isa.X87Registers;
+
+public class LinuxX8664RegisterBanks {
+
+    public static final RegisterBank GENERAL_REGISTERS = new RegisterBank()
+	.add(new RegisterEntry(80, 8, X8664Registers.RAX))
+	.add(new RegisterEntry(40, 8, X8664Registers.RBX))
+	.add(new RegisterEntry(88, 8, X8664Registers.RCX))
+	.add(new RegisterEntry(96, 8, X8664Registers.RDX))
+	.add(new RegisterEntry(104, 8, X8664Registers.RSI))
+	.add(new RegisterEntry(112, 8, X8664Registers.RDI))
+	.add(new RegisterEntry(32, 8, X8664Registers.RBP))
+	.add(new RegisterEntry(152, 8, X8664Registers.RSP))
+	.add(new RegisterEntry(72, 8, X8664Registers.R8))
+	.add(new RegisterEntry(64, 8, X8664Registers.R9))
+	.add(new RegisterEntry(56, 8, X8664Registers.R10))
+	.add(new RegisterEntry(48, 8, X8664Registers.R11))
+	.add(new RegisterEntry(24, 8, X8664Registers.R12))
+	.add(new RegisterEntry(16, 8, X8664Registers.R13))
+	.add(new RegisterEntry(8, 8, X8664Registers.R14))
+	.add(new RegisterEntry(0, 8, X8664Registers.R15))
+	.add(new RegisterEntry(128, 8, X8664Registers.RIP))
+	.add(new RegisterEntry(144, 8, X8664Registers.RFLAGS))
+	.add(new RegisterEntry(136, 8, "cs"))
+	.add(new RegisterEntry(160, 8, "ss"))
+	.add(new RegisterEntry(184, 8, "ds"))
+	.add(new RegisterEntry(192, 8, "es"))
+	.add(new RegisterEntry(200, 8, "fs"))
+	.add(new RegisterEntry(208, 8, "gs"))
+	.add(new RegisterEntry(120, 8, X8664Registers.ORIG_RAX))
+	.add(new RegisterEntry(168, 8, X8664Registers.FS_BASE))
+	.add(new RegisterEntry(176, 8, X8664Registers.GS_BASE))
+	;
+    
+    public static final RegisterBank FLOATING_POINT_REGISTERS = new RegisterBank()
+    // Format determined by FXSAVE instruction
+	.add(new RegisterEntry(0x00, 2, X87Registers.FCW))
+	.add(new RegisterEntry(0x02, 2, X87Registers.FSW))
+	.add(new RegisterEntry(0x04, 1, X87Registers.FTW))
+	.add(new RegisterEntry(0x06, 2, X87Registers.FOP))
+	.add(new RegisterEntry(0x08, 4, X87Registers.RIP))
+	.add(new RegisterEntry(0x10, 4, X87Registers.RDP))
+	.add(new RegisterEntry(0x18, 2, X87Registers.MXCSR))
+	.add(new RegisterEntry(0x1c, 2, X87Registers.MXCSR_MASK))
+	.add(new RegisterEntry(0x20, 10, X87Registers.ST0))
+	.add(new RegisterEntry(0x30, 10, X87Registers.ST1))
+	.add(new RegisterEntry(0x40, 10, X87Registers.ST2))
+	.add(new RegisterEntry(0x50, 10, X87Registers.ST3))
+	.add(new RegisterEntry(0x60, 10, X87Registers.ST4))
+	.add(new RegisterEntry(0x70, 10, X87Registers.ST5))
+	.add(new RegisterEntry(0x80, 10, X87Registers.ST6))
+	.add(new RegisterEntry(0x90, 10, X87Registers.ST7))
+	.add(new RegisterEntry(0xa0, 16, X87Registers.XMM0))
+	.add(new RegisterEntry(0xb0, 16, X87Registers.XMM1))
+	.add(new RegisterEntry(0xc0, 16, X87Registers.XMM2))
+	.add(new RegisterEntry(0xd0, 16, X87Registers.XMM3))
+	.add(new RegisterEntry(0xe0, 16, X87Registers.XMM4))
+	.add(new RegisterEntry(0xf0, 16, X87Registers.XMM5))
+	.add(new RegisterEntry(0x100, 16, X87Registers.XMM6))
+	.add(new RegisterEntry(0x110, 16, X87Registers.XMM7))
+	.add(new RegisterEntry(0x120, 16, X87Registers.XMM8))
+	.add(new RegisterEntry(0x130, 16, X87Registers.XMM9))
+	.add(new RegisterEntry(0x140, 16, X87Registers.XMM10))
+	.add(new RegisterEntry(0x150, 16, X87Registers.XMM11))
+	.add(new RegisterEntry(0x160, 16, X87Registers.XMM12))
+	.add(new RegisterEntry(0x170, 16, X87Registers.XMM13))
+	.add(new RegisterEntry(0x180, 16, X87Registers.XMM14))
+	.add(new RegisterEntry(0x190, 16, X87Registers.XMM15))
+	;
+    
+    public static final RegisterBank DEBUG_REGISTERS = new RegisterBank()
+	.add(new RegisterEntry(848, 8, X8664Registers.DR0))
+	.add(new RegisterEntry(856, 8, X8664Registers.DR1))
+	.add(new RegisterEntry(864, 8, X8664Registers.DR2))
+	.add(new RegisterEntry(872, 8, X8664Registers.DR3))
+	.add(new RegisterEntry(880, 8, X8664Registers.DR4))
+	.add(new RegisterEntry(888, 8, X8664Registers.DR5))
+	.add(new RegisterEntry(896, 8, X8664Registers.DR6))
+	.add(new RegisterEntry(904, 8, X8664Registers.DR7))
+	;
+}
diff --git a/frysk-core/frysk/isa/ISAMap.java b/frysk-core/frysk/bank/RegisterBank.java
similarity index 67%
copy from frysk-core/frysk/isa/ISAMap.java
copy to frysk-core/frysk/bank/RegisterBank.java
index 25fa072..76f3c9d 100644
--- a/frysk-core/frysk/isa/ISAMap.java
+++ b/frysk-core/frysk/bank/RegisterBank.java
@@ -37,50 +37,51 @@
 // version and license this file solely under the GPL without
 // exception.
 
-package frysk.isa;
+package frysk.bank;
+
+import inua.eio.ByteBuffer;
 


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frysk system monitor/debugger
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