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[SCM] master: Renaming CR reg and adding register for original r3 (arg).
- From: jflavio at sourceware dot org
- To: frysk-cvs at sourceware dot org
- Date: 22 Nov 2007 11:43:17 -0000
- Subject: [SCM] master: Renaming CR reg and adding register for original r3 (arg).
- Reply-to: frysk at sourceware dot org
The branch, master has been updated
via d493569a34db466c257c88071d35432e20859f66 (commit)
from 77939fcf72c66c6891797c90a0e4a19ec9e013e4 (commit)
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- Log -----------------------------------------------------------------
commit d493569a34db466c257c88071d35432e20859f66
Author: Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
Date: Thu Nov 22 09:42:59 2007 -0200
Renaming CR reg and adding register for original r3 (arg).
-----------------------------------------------------------------------
Summary of changes:
frysk-core/frysk/isa/ChangeLog | 7 +++++++
frysk-core/frysk/isa/PPC32Registers.java | 14 +++++++++-----
frysk-core/frysk/isa/PPC64Registers.java | 6 +++---
3 files changed, 19 insertions(+), 8 deletions(-)
First 500 lines of diff:
diff --git a/frysk-core/frysk/isa/ChangeLog b/frysk-core/frysk/isa/ChangeLog
index 3545ad6..66ed1aa 100644
--- a/frysk-core/frysk/isa/ChangeLog
+++ b/frysk-core/frysk/isa/ChangeLog
@@ -1,3 +1,10 @@
+2007-11-20 Jose Flavio Aguilar Paulino <jflavio@br.ibm>
+
+ * PPC64Registers.java: Renaming CR register to CCR,
+ to be compliant with PPC32.
+
+ * PPC32Registers.java: Add ARG register as in PTRACE (orig_r3).
+
2007-11-20 Andrew Cagney <cagney@redhat.com>
* X8664Registers.java (XMM0, XMM1, XMM2, XMM3, XMM4, XMM5)
diff --git a/frysk-core/frysk/isa/PPC32Registers.java b/frysk-core/frysk/isa/PPC32Registers.java
index 8387e61..f8f0ea2 100644
--- a/frysk-core/frysk/isa/PPC32Registers.java
+++ b/frysk-core/frysk/isa/PPC32Registers.java
@@ -113,17 +113,21 @@ public class PPC32Registers extends Registers {
= new Register("gpr31", StandardTypes.INT32B_T);
/* Special registers */
+ public static final Register ARG
+ = new Register("arg", StandardTypes.INT32B_T);
+ /* Counter reg */
public static final Register CTR
- = new Register("counterreg", StandardTypes.INT32B_T);
+ = new Register("ctr", StandardTypes.INT32B_T);
+ /* Fixed-point status and control register */
public static final Register XER
- = new Register("fixedstatuscontrolreg", StandardTypes.INT32B_T);
+ = new Register("xer", StandardTypes.INT32B_T);
public static final Register CCR
- = new Register("conditionreg", StandardTypes.INT32B_T);
+ = new Register("ccr", StandardTypes.INT32B_T);
public static final Register LR
- = new Register("linkreg", StandardTypes.VOIDPTR32B_T);
+ = new Register("lr", StandardTypes.VOIDPTR32B_T);
public static final Register FPSCR
- = new Register("floatingstatuscontrolreg", StandardTypes.INT32B_T);
+ = new Register("fpscr", StandardTypes.INT32B_T);
public static final Register FPR0
= new Register("fpr0", StandardTypes.FLOAT64B_T);
diff --git a/frysk-core/frysk/isa/PPC64Registers.java b/frysk-core/frysk/isa/PPC64Registers.java
index f93fcb1..e980166 100644
--- a/frysk-core/frysk/isa/PPC64Registers.java
+++ b/frysk-core/frysk/isa/PPC64Registers.java
@@ -180,8 +180,8 @@ public class PPC64Registers extends Registers {
= new Register("ctr", StandardTypes.INT64B_T);
public static final Register ARG
= new Register("arg", StandardTypes.INT64B_T);
- public static final Register CR
- = new Register("cr", StandardTypes.INT64B_T);
+ public static final Register CCR
+ = new Register("ccr", StandardTypes.INT64B_T);
public static final Register XER
= new Register("xer", StandardTypes.INT64B_T);
@@ -218,7 +218,7 @@ public class PPC64Registers extends Registers {
public static final RegisterGroup SPECIAL
= new RegisterGroup("special",
- new Register[] { LR, CTR, ARG, CR, XER,
+ new Register[] { LR, CTR, ARG, CCR, XER,
VRSAVE, VSCR, SPEACC, SPEFSCR,
FRP, NIP });
hooks/post-receive
--
frysk system monitor/debugger