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[Bug 1001219] Ethernet driver for STM32 connectivity line with port on MMstm32f107 board.


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Jerzy Dyrda <jerzdy@gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Attachment #1997|0                           |1
        is obsolete|                            |

--- Comment #42 from Jerzy Dyrda <jerzdy@gmail.com> 2012-12-24 21:45:55 GMT ---
Created an attachment (id=2007)
 --> (http://bugs.ecos.sourceware.org/attachment.cgi?id=2007)
Eth driver for STM32 family.

Hello Ilija,

(In reply to comment #41)
> (In reply to comment #39)
> > Created an attachment (id=1997)
 --> (http://bugs.ecos.sourceware.org/attachment.cgi?id=1997) [details]
[details]
> > Eth driver for STM32 family. 
> > After long time I've gone back to eth driver and now it's works as well on
> > STM32F4 controller. 
> > Patch consists only from driver, few extra definitions in 
> > packages/hal/cortexm/stm32/var/current/include/var_io_eth and entry in ecos.db
> > Disclaimer:
> > Driver was tested only on Olimex board STM32-E407 what means different
> > connections
> > between PHY and MAC (RMII mode and clock 50 MHz from external generator) than
> > on STM3240G-EVAL.
> > 
> 
> Jerzy, it would be of great help for testing if you provide some HAL patch for
> STM3240G-EVAL
I hope that I didnât miss anything. At now I couldn't find no more that type of
MII interface requested by ETH driver - rest stuff like pins configuration,
clocks enabling and so on is done by driver.
Regarding CYGNUM_DEVS_ETH_CORTEXM_STM32_REMAP_PINS option is valid only for F1
family while AFAIK it isn't any stm32_f1 board with Ethernet support in eCos
repo. Thus I left it in driver's cdl without implementing inside the driver. If
you think that the driver should configure it not board dependent part I will
add it.

Best regards,
jerzy

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