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PPC40x - assert modem signals on diag ports


-- 
Gary Thomas <gary@mlbassoc.com>
MLB Associates
Index: hal/powerpc/ppc40x/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/ppc40x/current/ChangeLog,v
retrieving revision 1.14
diff -u -5 -p -r1.14 ChangeLog
--- hal/powerpc/ppc40x/current/ChangeLog	26 Feb 2004 16:20:12 -0000	1.14
+++ hal/powerpc/ppc40x/current/ChangeLog	16 Sep 2004 21:50:26 -0000
@@ -1,5 +1,9 @@
+2004-09-16  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/hal_diag.c: Assert RTS/DTR modem signals.
+
 2004-02-26  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/ppc405_pci.c: 
 	* cdl/hal_powerpc_ppc40x.cdl: Make display of PCI "contents" optional.
 
Index: hal/powerpc/ppc40x/current/src/hal_diag.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/ppc40x/current/src/hal_diag.c,v
retrieving revision 1.1
diff -u -5 -p -r1.1 hal_diag.c
--- hal/powerpc/ppc40x/current/src/hal_diag.c	19 Sep 2003 17:11:30 -0000	1.1
+++ hal/powerpc/ppc40x/current/src/hal_diag.c	16 Sep 2004 17:26:53 -0000
@@ -7,11 +7,11 @@
 //=============================================================================
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-// Copyright (C) 2002, 2003 Gary Thomas
+// Copyright (C) 2002, 2003, 2004 Gary Thomas
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
 // Software Foundation; either version 2 or (at your option) any later version.
 //
@@ -117,10 +117,14 @@
 #define SIO_LSR_BI      0x10            // break interrupt
 #define SIO_LSR_THRE    0x20            // transmitter holding register empty
 #define SIO_LSR_TEMT    0x40            // transmitter register empty
 #define SIO_LSR_ERR     0x80            // any error condition
 
+// Modem control register
+#define SIO_MCR_DTR     0x01            // [inverted] DTR
+#define SIO_MCR_RTS     0x02            // [inverted] RTS
+
 // The modem status register bits.
 #define SIO_MSR_DCTS  0x01              // delta clear to send
 #define SIO_MSR_DDSR  0x02              // delta data set ready
 #define SIO_MSR_TERI  0x04              // trailing edge ring indicator
 #define SIO_MSR_DDCD  0x08              // delta data carrier detect
@@ -196,10 +200,13 @@ init_serial_channel(const channel_data_t
     HAL_WRITE_UINT8(base+CYG_DEV_SERIAL_LCR, lcr);
 
     // Enable FIFOs (and clear them).
     HAL_WRITE_UINT8(base+CYG_DEV_SERIAL_FCR,
                     (SIO_FCR_FCR0 | SIO_FCR_FCR1 | SIO_FCR_FCR2));
+
+    // Assert handshake signals
+    HAL_WRITE_UINT8(base+CYG_DEV_SERIAL_MCR, (SIO_MCR_DTR|SIO_MCR_RTS));
 }
 
 static cyg_bool
 cyg_hal_var_serial_getc_nonblock(char* __ch_data, cyg_uint8* ch)
 {

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