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Hello, this is a port of our new platform "ARM Industrial Module AIM 711" based on a Samsung S3C4510 ARM7TDMI processor. It contains the following parts: - The hal package, which is based on the hal of the snds platform. - A wallclock package, which uses the Dallas DS1307 driver. - A serial driver for the internal ports of the S3C4510, which is based on the e7t driver, but is splitted into a device depending and a platform depending part. Maybe the e7t driver could be changed to use the S3C4510 driver too, not to have double code. The platform depending part of the serial driver has also a part for the external 16550 UART which is on the AIM 711. - A flash package which uses the SST 39VFXXX flash driver. - A patch for the KS32C5000 ethernet driver to also support the phy device RTL8201. For more information about the board look at: http://www.visionsystems.de/arm7.html Best regards, Roland -- ___________________________________________________ VS Vision Systems GmbH, Industrial Image Processing Dipl.-Ing. Roland Caßebohm Aspelohe 27A, D-22848 Norderstedt, Germany http://www.visionsystems.de ___________________________________________________
Attachment:
aim711.tgz
Description: application/tgz
Attachment:
flash_aim711.tgz
Description: application/tgz
Attachment:
wallclock_aim711.tgz
Description: application/tgz
Attachment:
serial_s3c4510.tgz
Description: application/tgz
Index: ecos.db
===================================================================
RCS file: /home/cassebohm/net/USERS/CVSROOT/VSprojects/ecos/packages/ecos.db,v
retrieving revision 1.1.1.5
retrieving revision 1.1.1.1.2.10
diff -u -5 -p -r1.1.1.5 -r1.1.1.1.2.10
--- ecos.db 12 Feb 2004 09:45:51 -0000 1.1.1.5
+++ ecos.db 12 Feb 2004 11:39:35 -0000 1.1.1.1.2.10
@@ -493,10 +493,20 @@ package CYGPKG_DEVS_FLASH_ARM_INNOVATOR
description "
This package contains hardware support for FLASH memory
on the Innovator platform."
}
+package CYGPKG_DEVS_FLASH_ARM_AIM711 {
+ alias { "Support for flash memory on AIM 711 board" flash_arm_snds }
+ directory devs/flash/arm/aim711
+ script flash_arm_aim711.cdl
+ hardware
+ description "
+ This package contains hardware support for flash memory
+ on the ARM Industrial Module AIM 711 platform."
+}
+
package CYGPKG_DEVS_FLASH_NANO {
alias { "FLASH memory support for Intel SA1110 nanoEngine" flash_nano }
directory devs/flash/arm/nano
script flash_nano.cdl
hardware
@@ -871,10 +881,50 @@ package CYGPKG_IO_SERIAL_ARM_E7T {
directory devs/serial/arm/e7t
script ser_arm_e7t.cdl
description "ARM AEB-2 (E7T) serial device drivers"
}
+package CYGPKG_IO_SERIAL_ARM_S3C4510 {
+ alias { "Generig ARM S3C4510 serial device driver"
+ devs_serial_arm_s3c4510 s3c4510_serial_driver }
+ hardware
+ directory devs/serial/arm/s3c4510
+ script ser_arm_s3c4510.cdl
+ description "Generic serial device driver for the internal
+ serial interface of the S3C4510"
+}
+
+package CYGPKG_IO_SERIAL_ARM_AIM711 {
+ alias { "AIM 711 serial device drivers"
+ devs_serial_arm_aim711 aim711_serial_driver }
+ hardware
+ directory devs/serial/arm/aim711
+ script ser_arm_aim711.cdl
+ description "ARM Industral Module AIM 711 serial device drivers"
+}
+
+package CYGPKG_IO_SERIAL_ARM_AIM711_S3C4510 {
+ alias { "AIM 711 S3C4510 serial device driver"
+ devs_serial_arm_aim711_s3c4510 aim711_s3c4510_serial_driver }
+ hardware
+ directory devs/serial/arm/aim711
+ script ser_arm_aim711_s3c4510.cdl
+ description "ARM Industral Module AIM 711 serial device driver
+ for the internal serial interface of the S3C4510"
+}
+
+package CYGPKG_IO_SERIAL_ARM_AIM711_16X5X {
+ alias { "ARM AIM711 16x5x serial device driver"
+ devs_serial_arm_aim711_16x5x aim711_16x5x_serial_driver }
+ hardware
+ directory devs/serial/arm/aim711
+ script ser_arm_aim711_16x5x.cdl
+ description "ARM Industral Module AIM 711 serial device driver
+ for the external 16550 device using the generic
+ 16x5x driver"
+}
+
package CYGPKG_IO_SERIAL_ARM_INTEGRATOR {
alias { "ARM INTEGRATOR serial device drivers"
devs_serial_arm_integrator integrator_serial_driver }
hardware
directory devs/serial/arm/integrator
@@ -1842,10 +1892,20 @@ package CYGPKG_DEVS_WALLCLOCK_SYNTH {
description "
This package provides a wallclock driver implementation for the
synthetic target."
}
+package CYGPKG_DEVICES_WALLCLOCK_ARM_AIM711 {
+ alias { "Wallclock driver for AIM 711" devs_wallclock_arm_aim711 aim711_rtc }
+ directory devs/wallclock/arm/aim711
+ script aim711_wallclock_drivers.cdl
+ hardware
+ description "
+ This package provides a wallclock driver implementation for the
+ ARM Industrial Module AIM 711."
+}
+
package CYGPKG_DEVICES_WATCHDOG_ARM_AEB {
alias { "Watchdog driver for ARM/AEB board" devices_watchdog_aeb device_watchdog_aeb }
directory devs/watchdog/arm/aeb
script watchdog_aeb.cdl
hardware
@@ -2440,10 +2500,20 @@ package CYGPKG_HAL_ARM_SNDS {
description "
The SNDS HAL package provides the support needed to run eCos on a
Samsung SNDS eval board"
}
+package CYGPKG_HAL_ARM_AIM711 {
+ alias { "ARM Industial Module AIM 711" hal_arm_aim711 arm_aim711_hal}
+ directory hal/arm/aim711
+ script hal_arm_aim711.cdl
+ hardware
+ description "
+ The ARM Industial Module AIM 711 HAL package provides the support
+ needed to run eCos on a ARM Industial Module AIM 711."
+}
+
package CYGPKG_DEVS_ETH_SMSC_LAN91CXX {
alias { "SMSC LAN91CXX ethernet driver" lan91cxx_eth_driver lan9000_eth_driver }
hardware
directory devs/eth/smsc/lan91cxx
script smsc_lan91cxx_eth_drivers.cdl
@@ -4193,10 +4263,35 @@ target snds {
}
enable { CYGHWR_HAL_ARM_BIGENDIAN }
description "
The snds target provides the packages needed to run eCos on a
Samsung SNDS eval board."
+}
+
+target aim711 {
+ alias { "ARM Industrial Module AIM 711" AIM711 aim711 }
+ packages {
+ CYGPKG_HAL_ARM
+ CYGPKG_HAL_ARM_AIM711
+ CYGPKG_DEVS_FLASH_ARM_AIM711
+ CYGPKG_DEVS_FLASH_SST_39VFXXX
+ CYGPKG_DEVS_ETH_ARM_KS32C5000
+ CYGPKG_IO_SERIAL_ARM_AIM711
+ CYGPKG_IO_SERIAL_ARM_S3C4510
+ CYGPKG_IO_SERIAL_ARM_AIM711_S3C4510
+ CYGPKG_IO_SERIAL_GENERIC_16X5X
+ CYGPKG_IO_SERIAL_ARM_AIM711_16X5X
+ CYGPKG_DEVICES_WALLCLOCK_ARM_AIM711
+ CYGPKG_DEVICES_WALLCLOCK_DALLAS_DS1307
+ }
+ enable CYGHWR_HAL_ARM_BIGENDIAN
+ disable CYGPKG_DEVS_ETH_ARM_KS32C5000_PHY_LXT970
+ enable CYGPKG_DEVS_ETH_ARM_KS32C5000_PHY_RTL8201
+ set_value CYGPKG_DEVS_ETH_ARM_KS32C5000_PHYADDR 2
+ description "
+ The aim711 target provides the packages needed to run eCos on a
+ ARM Industrial Module AIM 711."
}
target mpc50 {
alias { "MICROPLEX Printer Controller 5.0" mpc50 }
packages {
Attachment:
serial_aim711.tgz
Description: application/tgz
Index: packages/devs/eth/arm/ks32c5000//current/ChangeLog
===================================================================
RCS file: /home/cassebohm/net/USERS/CVSROOT/VSprojects/ecos/packages/devs/eth/arm/ks32c5000/current/ChangeLog,v
retrieving revision 1.1.1.1
diff -u -5 -p -r1.1.1.1 ChangeLog
--- packages/devs/eth/arm/ks32c5000//current/ChangeLog 29 Sep 2003 15:15:43 -0000 1.1.1.1
+++ packages/devs/eth/arm/ks32c5000//current/ChangeLog 9 Oct 2003 13:53:47 -0000
@@ -1,5 +1,10 @@
+2003-10-09 Roland Cassebohm <roland.cassebohm@visionsystems.de>
+
+ * src/rtl8201.c: New file. Added RTL8201 PHY support.
+ * cdl/ks32c5000_eth.cdl: CDL to allow configuration of the above.
+
2003-06-24 Jonathan Larmour <jifl@eCosCentric.com>
* src/ks5000_ether.c: Some tidies of the previous changes.
* cdl/ks32c5000_eth.cdl: Clarify option description and rename
CYGVAR_DEVS_ETH_ARM_KS32C5000_REDBOOT_HOLDS_ESA_ETH0 to
Index: packages/devs/eth/arm/ks32c5000//current/cdl/ks32c5000_eth.cdl
===================================================================
RCS file: /home/cassebohm/net/USERS/CVSROOT/VSprojects/ecos/packages/devs/eth/arm/ks32c5000/current/cdl/ks32c5000_eth.cdl,v
retrieving revision 1.1.1.1
retrieving revision 1.1.1.1.2.1
diff -u -5 -p -r1.1.1.1 -r1.1.1.1.2.1
--- packages/devs/eth/arm/ks32c5000//current/cdl/ks32c5000_eth.cdl 29 Sep 2003 15:15:43 -0000 1.1.1.1
+++ packages/devs/eth/arm/ks32c5000//current/cdl/ks32c5000_eth.cdl 8 Oct 2003 16:37:04 -0000 1.1.1.1.2.1
@@ -145,10 +145,18 @@ cdl_package CYGPKG_DEVS_ETH_ARM_KS32C500
"TEST_BLINK_SLOW"}
default_value {"LINK_ACTIVITY"}
}
}
+ cdl_option CYGPKG_DEVS_ETH_ARM_KS32C5000_PHY_RTL8201 {
+ display "RTL8201 PHY support"
+ flavor bool
+ default_value 0
+ implements CYGINT_DEVS_ETH_ARM_KS32C5000_PHY
+ compile -library=libextras.a rtl8201.c
+ }
+
cdl_option CYGPKG_DEVS_ETH_ARM_KS32C5000_PHYADDR {
display "PHY MII address"
flavor data
legal_values 0 to 31
default_value 1
Index: packages/devs/eth/arm/ks32c5000//current/src/rtl8201.c
===================================================================
RCS file: packages/devs/eth/arm/ks32c5000//current/src/rtl8201.c
diff -N packages/devs/eth/arm/ks32c5000//current/src/rtl8201.c
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ packages/devs/eth/arm/ks32c5000//current/src/rtl8201.c 9 Oct 2003 13:50:05 -0000
@@ -0,0 +1,170 @@
+#include <pkgconf/system.h>
+#include <pkgconf/hal.h>
+#include <cyg/hal/hal_if.h>
+
+#include <pkgconf/devs_eth_arm_ks32c5000.h>
+
+#include "std.h"
+#include "phy.h"
+
+// Set up the level of debug output
+#if CYGPKG_DEVS_ETH_ARM_KS32C5000_DEBUG_LEVEL > 0
+#define debug1_printf(args...) diag_printf(args)
+#else
+#define debug1_printf(args...) /* noop */
+#endif
+#if CYGPKG_DEVS_ETH_ARM_KS32C5000_DEBUG_LEVEL > 1
+#define debug2_printf(args...) diag_printf(args)
+#else
+#define debug2_printf(args...) /* noop */
+#endif
+
+// address of the RTL8201 phy
+#ifdef CYGPKG_DEVS_ETH_ARM_KS32C5000_PHYADDR
+#define RTL8201_ADDR CYGPKG_DEVS_ETH_ARM_KS32C5000_PHYADDR
+#else
+#warning no Phy addr set
+#define RTL8201_ADDR 1
+#endif
+
+// RTL8201 register offsets
+#define RTL8201_CNTL_REG 0x00
+#define RTL8201_STATUS_REG 0x01
+#define RTL8201_ID_REG1 0x02
+#define RTL8201_ID_REG2 0x03
+#define RTL8201_ANA_REG 0x04
+#define RTL8201_ANLPA_REG 0x05
+#define RTL8201_ANE_REG 0x06
+#define RTL8201_NSR_REG 0x10
+#define RTL8201_LBREMR_REG 0x11
+#define RTL8201_RXER_REG 0x12
+#define RTL8201_10M_NIC_REG 0x13
+#define RTL8201_PHY1_1_REG 0x14
+#define RTL8201_PHY1_2_REG 0x15
+#define RTL8201_PHY2_REG 0x16
+#define RTL8201_TWISTER1_REG 0x17
+#define RTL8201_TWISTER2_REG 0x18
+#define RTL8201_TEST_REG 0x19
+
+// RTL8201 Control register bit defines
+#define RTL8201_CNTL_RESET 0x8000
+#define RTL8201_CNTL_LOOPBACK 0x4000
+#define RTL8201_CNTL_SPEED 0x2000 // 1=100Meg, 0=10Meg
+#define RTL8201_CNTL_AN 0x1000 // 1=Enable auto negotiation, 0=disable it
+#define RTL8201_CNTL_PWRDN 0x0800 // 1=Enable power down
+#define RTL8201_CNTL_RSTRT_AN 0x0200 // 1=Restart Auto Negotioation process
+#define RTL8201_CNTL_FULL_DUP 0x0100 // 1=Enable full duplex mode, 0=half dup
+
+#define Bit(n) (1<<(n))
+
+#define RTL8201_STATUS_100T4 Bit(15)
+#define RTL8201_STATUS_100TX_FULL Bit(14)
+#define RTL8201_STATUS_100TX Bit(13)
+#define RTL8201_STATUS_10T_FULL Bit(12)
+#define RTL8201_STATUS_10T Bit(11)
+#define RTL8201_STATUS_AN_COMLETE Bit(5)
+#define RTL8201_STATUS_LINKUP Bit(2)
+
+#define RTL8201_ANA_PAUSE_ENA Bit(10)
+#define RTL8201_ANA_100T4 Bit(9)
+#define RTL8201_ANA_100TX_FULL Bit(8)
+#define RTL8201_ANA_100TX Bit(7)
+#define RTL8201_ANA_10T_FULL Bit(6)
+#define RTL8201_ANA_10T Bit(5)
+#define RTL8201_ANA_SEL_802_3 Bit(0)
+
+#define RTL8201_TEST_LINK_10 Bit(1)
+#define RTL8201_TEST_LINK_100 Bit(0)
+#define RTL8201_TEST_PHY_ADR (0x1f<<8)
+
+static int do_autonegotation=0;
+
+#ifndef CYGPKG_KERNEL
+#define DEBUG_PRINTF(format, a...) diag_printf(format, ## a)
+#else
+#define DEBUG_PRINTF(format, a...)
+#endif
+
+void PhyReset(void)
+{
+ static int init_done=0;
+ unsigned Status;
+
+ if (init_done)
+ return;
+
+ init_done=1;
+
+ debug2_printf("Phy addr %d\n",RTL8201_ADDR);
+ // first software reset the RTL8201
+ MiiStationWrite(RTL8201_CNTL_REG, RTL8201_ADDR, RTL8201_CNTL_RESET);
+ MiiStationWrite(RTL8201_CNTL_REG, RTL8201_ADDR, 0);
+
+#if 1
+ // initialize auto-negotiation capabilities
+ MiiStationWrite(RTL8201_ANA_REG,RTL8201_ADDR,
+ RTL8201_ANA_100TX_FULL+
+ RTL8201_ANA_100TX+
+ RTL8201_ANA_10T_FULL+
+ RTL8201_ANA_10T+
+ RTL8201_ANA_SEL_802_3);
+ // Now start an auto negotiation
+ debug2_printf("Start auto negotiation\n");
+ MiiStationWrite(RTL8201_CNTL_REG, RTL8201_ADDR,
+ RTL8201_CNTL_AN+
+ RTL8201_CNTL_RSTRT_AN);
+#elif 0
+#warning force to 10M full duplex
+ // initialize auto-negotiation capabilities
+ MiiStationWrite(RTL8201_ANA_REG,RTL8201_ADDR,
+ RTL8201_ANA_10T_FULL+
+ RTL8201_ANA_10T+
+ RTL8201_ANA_SEL_802_3);
+ // force to 10M full duplex
+ MiiStationWrite(RTL8201_CNTL_REG, RTL8201_ADDR,
+ RTL8201_CNTL_FULL_DUP);
+#else
+#warning force to 10M half duplex
+ // initialize auto-negotiation capabilities
+ MiiStationWrite(RTL8201_ANA_REG,RTL8201_ADDR,
+ RTL8201_ANA_10T+
+ RTL8201_ANA_SEL_802_3);
+ // force to 10M half duplex
+ MiiStationWrite(RTL8201_CNTL_REG, RTL8201_ADDR,
+ 0);
+#endif
+}
+
+unsigned PhyStatus(void)
+{
+ unsigned Status;
+ unsigned r = 0, count=0;
+
+ // Wait for auto negotiation to get completed
+ do
+ {
+ Status = MiiStationRead(RTL8201_STATUS_REG,RTL8201_ADDR);
+ CYGACC_CALL_IF_DELAY_US(10000);
+ count++;
+ }
+ while (!(Status&RTL8201_STATUS_AN_COMLETE) && count<500);
+ //If it takes longer then 5 sec stop waiting
+
+ Status = MiiStationRead(RTL8201_STATUS_REG,RTL8201_ADDR);
+ if (Status & RTL8201_STATUS_LINKUP)
+ r |= PhyStatus_LinkUp;
+ Status = MiiStationRead(RTL8201_CNTL_REG,RTL8201_ADDR);
+ if (Status & RTL8201_CNTL_FULL_DUP)
+ r |= PhyStatus_FullDuplex;
+ Status = MiiStationRead(RTL8201_TEST_REG,RTL8201_ADDR);
+ if (Status & RTL8201_TEST_LINK_100)
+ r |= PhyStatus_100Mb;
+
+ debug2_printf("PhyStatus=0x%x\n",r);
+
+ return r;
+}
+
+void PhyInterruptAck(void)
+{
+}
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