Re: patch - at91 serial drivers assumed realtime response for DSRroutines

[Laurent GONZALEZ <laurent dot gonzalez at silicomp dot fr>]

On 21 Oct 2003 19:18:01 +0100
Nick Garnett <nickg@ecoscentric.com> wrote:

> Øyvind Harboe <oyvind.harboe@zylin.com> writes:
> 
> > The at91 serial routines are broken in that they assume a very low
> > latency for the DSR handler.
> 
> As it happens, I have been looking at this problem myself recently.
> 
> While Paul Sheer's patch reduced the problems with serial performance,
> it did not totally fix it.
> 

This is true. And what you probably not know that there is strange
behaviour with the PDC, that makes the clever at91 serial patch I ever
seen here, not reliable enough for handling very high load on the serial
line. I will ask my manager if it is possible to contribute our work.



> > 
> > Although the ISR interrupt latency is still an issue, this should be
> > a step forward:
> > 
> > - it would bring the hardware buffering code under the scruteny of
> > the eCos community
> > - since the code is now in "at91 speak", a bit of the tedium has now
> > been removed if someone decides to do the "fast interrupt" support.
> > 
> 
> My observation is that the EB40A has no problem keeping up with even
> the highest baud rate. However, this board uses an AT91R40008 which
> has 256k of on-chip SRAM. The other AT91 parts all have just 8k of
> on-chip SRAM which eCos does not use, apart from a few words for the
> interrupt vectors, VSR table and virtual vector table.

IMHO, even the eb40a cannot handle high speed serial traffic. Moreover,
for those wanting to test SLIP or PPP, the internal SRAM is not big
enough.

> whole. Also, once this has been done, the existing serial ISR code
> would work without using the PDC.
> 

I don't think so. Remember that using the PDC dramatically reduces the
IT rate.

-- 
GONZALEZ Laurent
Silicomp Research Institute
Tel: 04 76 41 66 98