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Re: sh7751, fix some Interrupt Vector Definitions
- From: Jonathan Larmour <jifl at jifvik dot org>
- To: Larice Robert <larice at vidisys dot de>
- Cc: ecos-patches at sources dot redhat dot com, Jesper Skov <jskov at zoftcorp dot dk>
- Date: Fri, 12 Jul 2002 18:38:33 +0100
- Subject: Re: sh7751, fix some Interrupt Vector Definitions
- References: <200206050712.g557CEx24287@doms.vidisys.com>
Larice Robert wrote:
>
> I'd like to contribute a tiny patch to fix some Interrupt Vector definitions
> for the hitachi SH7751 cpu.
> specification can be found in the sh7751 datasheet
> "Section 19 Interrupt Controller (INTC)"
> "Table 19.5 Interrupt Exception Handling Sources and Priority Order"
> this patch is not board specific, but cpu specific
Sorry for the delay. I've looked at the specification (
http://www.hitachi-eu.com/hel/ecg/products/micro/pdf/sh7751h.pdf ) but due
to lack of familiarity with these specifics, I can't really say for
definite that it's right or wrong. Can you a) provide a little more
explanation so I can be sure it's correct, and b) provide a ChangeLog entry
:-).
OTOH, I've CC'd Jesper who may also be able to tell me if it's good or not.
Jifl
> --- ecos-orig/packages/hal/sh/sh4/current/include/var_intr.h Fri May 24 01:05:05 2002
> +++ ecos/packages/hal/sh/sh4/current/include/var_intr.h Tue Jun 4 08:40:23 2002
> @@ -124,8 +124,8 @@
>
> #ifndef CYGHWR_HAL_SH_IRQ_USE_IRQLVL
> -# define CYGNUM_HAL_INTERRUPT_IRL0 CYGNUM_HAL_INTERRUPT_LVL0
> -# define CYGNUM_HAL_INTERRUPT_IRL1 CYGNUM_HAL_INTERRUPT_LVL1
> -# define CYGNUM_HAL_INTERRUPT_IRL2 CYGNUM_HAL_INTERRUPT_LVL2
> -# define CYGNUM_HAL_INTERRUPT_IRL3 CYGNUM_HAL_INTERRUPT_LVL3
> +# define CYGNUM_HAL_INTERRUPT_IRL0 CYGNUM_HAL_INTERRUPT_LVL2
> +# define CYGNUM_HAL_INTERRUPT_IRL1 CYGNUM_HAL_INTERRUPT_LVL5
> +# define CYGNUM_HAL_INTERRUPT_IRL2 CYGNUM_HAL_INTERRUPT_LVL8
> +# define CYGNUM_HAL_INTERRUPT_IRL3 CYGNUM_HAL_INTERRUPT_LVL11
> #endif
>
--
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