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Interrupt stack on ARM arch.
- From: "Martin Laabs" <martin dot laabs at mailbox dot tu-dresden dot de>
- To: "ecos-discuss at ecos dot sourceware dot org" <ecos-discuss at ecos dot sourceware dot org>
- Date: Sun, 15 Feb 2009 21:57:03 +0100
- Subject: [ECOS] Interrupt stack on ARM arch.
Hi,
I've been looking in vectors.S in ecos/packages/hal/arm because I
get a trap when disableing the CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
option.
There you find the following:
IRQ:
// Note: I use this exception stack while saving the context because
// the current SP does not seem to be always valid in this CPU mode.
ldr sp,.__exception_stack // get good stack
stmfd sp!,{r0-r5} // save some supervisor regs
sub r0,lr,#4 // PC at time of interrupt
mrs r1,spsr
mov r2,#CYGNUM_HAL_VECTOR_IRQ
mov r3,sp
[...]
Does this mean, that every interrupt will use the (much to small)
exception stack if no dedicated interrupt stack is defined?
Thank you,
Martin L.
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