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Re: Re: Cortex-M3 interrupt handling & context switching
- From: Simon Kallweit <simon dot kallweit at intefo dot ch>
- To: kross at elands dot co dot nz
- Cc: ecos-discuss at ecos dot sourceware dot org
- Date: Tue, 07 Oct 2008 10:54:49 +0200
- Subject: Re: [ECOS] Re: Cortex-M3 interrupt handling & context switching
- References: <1223329271.1446.ezmlm@ecos.sourceware.org> <48EB21CC.9030402@elands.co.nz>
Keith Ross schrieb:
Simon Kallweit wrote:
... I'm again faced with the proper implementation of interrupt
handling and context switching. I'm still a bit puzzled, and would
really appreciate some help, if anyone knows a bit of the Cortex-M3
architecture and the ecos kernel. I would like to use the Cortex's
feature of saving/restoring some of the processors state
automatically when entering/leaving exceptions (namely pc, lr, r12,
r0-r3)....
Sorry Simon, I've had a look at the manual and your code. But I
haven't written any code.
Ok.
I'll continue to plod though it but without JTAG I can't check any
code. The people from ST could be well placed to do this bit (?) or
maybe one of the people who put there hand up for the cortex port in
the past.
I see. The current situtation is that I'm the only one activly working
on the port. The people from ST are just starting to get up and running
with ecos, and I guess it will be a few days until they can start
contributing. As we need to progress with the port (my company) I'll try
to do as much as I can to get it working, hoping to get some reviews and
support from the community. I think that I start to get the big picture
together, and can start implement and test bits and pieces and see where
it goes. I'll try to keep the list updated with what I do and hope for
some responses, I'm really glad for anything that comes back :)
Simon, your code outline sounds good. I'll look into this a little more.
Thanks for the comment.
Simon
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