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Re: Init sequence for enabling MMU at mpc5xx fails


Andrey:

The MMU uses burst access to DRAM. It might very well be that
your burst patterns in the UPM memory are not quite correct.
You can check this by setting the BIH bit in the ORx register
for your DRAM. This will inhibit the use of UPM burst patterns and
use single beat patterns instead. If your board now works after
you enable the MMU, then you know where where to look.

Tony

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