Re: [ECOS] J3 flash lockbits across reset

[Andrew Lunn <andrew at lunn dot ch>]

On Thu, Jan 12, 2006 at 03:33:03AM -0500, alfred hitch wrote:
> Hi,
> 
> I am confused on what is the correct behavior across power resets
> (of hardware) for J3 flash'es.
> 
> 1) Will all sectors which were locked before power reset, remain so ?
> 
> I am confused by some posts on net, saying they get locked (all) by
> default across resets (irr. of before power reset status)
> 
> Some say, it is unlocked (all blocks )by default  across resets.
> 
> I dont think flash should change status across resets. It should
> preserve whatever I locked before reboot and vice versa.

The data sheet for the chip is the best source of answer for this
question.

> 2) Is it dependant on version, looking at j3 v d there seem to be a
> bug on registers for same also which was fixed. Gives me an errie
> feeling that responses on net were diff. because of people using diff.
> kernels and flash revisions and so diff. observations ?

"kernels" are you talking "Linux" here? This is an eCos mailling list.
 
> 3) Intel FAQ says, that :
> 
> While setting up a Set Block Lock-Bit or Clear Block-Bits operation.
> must the first and second bus cycles be sequential write operations
> (i.e., no other bus operations to the flash between write cycles)?
> For the Set and Clear Block Lock Bit operations, the first and second
> bus cycles must be sequential. If the 28xxxJ3 receives any other
> command during the second write cycle, an invalid command sequence
> occurs. This causes the mode (the first bus cycle) to be aborted, and
> bits 5 and 4 in the Status Register will be set.
> 
> So, will this effectively mean that I cannot use this lock / unlock
> feature unless I can be sure there will be no read / write etc from
> ANY flash location ? as this will break the WSM sequence ?

It sounds like you need to ensure the functions to lock/unlock are
running from RAM and that you disable interrupts. Running from RAM is
easy to acheive, in fact all code which acts on the FLASH needs to do
this. Just cut&paste the attribute section statement. Most of the
flash drivers don't disable interrupts, but this is also easy to add
for your specific driver.
 
        Andrew

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