RE: [ECOS] clearing bss indirectly causes interrupt?

["Matt Sartori" <msartori at hanoverdisplays dot com>]

Correction, when I wrote WMS below I actually meant WPG (Word Program).
The WMS does not cause any exception.

-----Original Message-----
From: ecos-discuss-owner@ecos.sourceware.org
[mailto:ecos-discuss-owner@ecos.sourceware.org] On Behalf Of Matt
Sartori
Sent: 12 September 2005 11:44
To: eCos Discussion
Subject: [ECOS] clearing bss indirectly causes interrupt?

Hi everyone,
I've spent the last week trying to work out why my flash drivers didn't
work. Whenever I'd write the write WMS (write mode start) flag to the
flash control register Redboot would output a strange string (which I
learned was a GDB debug message) and hang. The message turned out to be
GDB telling me that an undefined instruction exception had happened.
Chasing that down has led me to a strange place:
If I call my flash test procedure before the part of vectors.S which
nulls the bss section everything works as expected; it erases (sets to
0xffffffff) bank 1 sector 0 and then writes a word at the bottom of that
sector.
If I call the test procedure after the bss is cleared then the setting
of the WMS flag in flash_cr0 causes an undefined instruction exception
(0x4).
If I ignore the exception (control returns to the flash test procedure)
then it succeeds just fine as above.

Why does this exception happen at all and even more strangely why only
after initing the bss?!? If I don't intercept at that early stage I'm
not able to ignore the exception either because Redboot reacts to it by
outputting the gdb string and hanging.

m@

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