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RE: load problems


Thank you. 
That did solve my first problem. My CYGMEM_SECTION_heap1_SIZE definition
in the xxx_rom.h was wrong. 
Unfortunately this does not seem to have been the cause of the second
problem of not loading beyond the first 256 bytes. 
In order to debug more easily I have attempted to use gdb but am only
able to use the same port for both console and debugging despite having
set the CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL and _CONSOLE_CHANNEL to
0 and 1 (in the .cdl file), the CYGDBG_HAL_DIAG_TO_DEBUG_CHAN and
CYGSEM_HAL_VIRTUAL_VECTOR_INHERIT_CONSOLE to 0 (in the xxx_ROM.ecm
file). 
It seems that whatever port first receives data becomes activated for
both uses.
As an (even better) alternative I'd like to use the JTAG on the board
but I'd have to convert the redboot makefile (that is re-generated every
time I change an option) to the uVision IDE with which my JTAG debugger
works. 
What do you guys use to debug your hw? 

m@

-----Original Message-----
From: Andrew Lunn [mailto:andrew@lunn.ch] 
Sent: 19 July 2005 19:46
To: Matt Sartori
Cc: ecos-discuss@ecos.sourceware.org
Subject: Re: [ECOS] load problems

On Tue, Jul 19, 2005 at 04:51:10PM +0100, Matt Sartori wrote:
> Hi all,
> 
> I am in the middle of porting Redboot/eCos to an STR71X board and have
> reached the point where I have the basic console working on the board,
I
> can examine memory, etc. I am now attempting to load something
> (anything) into RAM on the board, using the command
> 
> Load -m ymodem -r -b 0x20004000 test.txt
> 
> but I am getting the error message
> "Specified address (0x20004000) is not believed to be in RAM -
continue
> (y/n)?"
> This is confounding as it is, and if I choose yes it only ever
> successfully transfers the first packet (confirmed by subsequently
doing
> a memory dump of the memory that was written to). 
> The xxx_rom.h/xxx_rom.ldi correctly define the memory locations for
the
> platform (RAM at 0x20000000, size 0x10000 and ROM at 0x40000000, size
> 0x40000). 
> The diag output on reset is 
> 
> +
> RedBoot(tm) bootstrap and debug environment [ROM]
> Non-certified release, version UNKNOWN - built 14:42:08, Jul 19 2005
> 
> Platform: STM STR7X/STR710FZ2 (ARM7TDMI-S)
> Copyright (C) 2000, 2001, 2002, 2003, 2004 Red Hat, Inc.
> 
> RAM: 0x20000000-0x20010000, [0x20006b88-0x20004000] available
                               ^^^^^^^^^^^^^^^^^^^^^^

Take a closer look. The start is supposed to be below the end!

Take a look at cyg_start in redboot/current/src/main.c. Something is
wrong with your workspace_end. 

        Andrew

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