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Re: ARM - AT91 - SPI
- From: Savin Zlobec <savin at elatec dot si>
- To: Sebastian Block <SebastianBlock at gmx dot net>
- Cc: ecos-discuss at sources dot redhat dot com
- Date: Mon, 08 Nov 2004 12:12:05 +0100
- Subject: [ECOS] Re: ARM - AT91 - SPI
- References: <200411081133.52245.SebastianBlock@gmx.net>
Sebastian Block wrote:
Hi,
I think that there is an error in implementation of the function
spi_at91_transaction_begin(cyg_spi_device *dev) in spi_at91.c (Line 412)
HAL_WRITE_UINT32(AT91_SPI+AT91_SPI_CSR0, val);
Using other devices on the spi-bus is not possible.
Only the Chip on CS0 is supported, because even if you write to another
device-number the generated baudrate and signal mode is only for chip one.
The SPI chip selects are driven manually (bus init sets NPCS pins in IO
output mode),
this is needed to satisfy the CS control requirements of SPI bus
infrastructure. The
AT91 SPI controller uses only CS0, but the 'outside' world should see
the requested
CS active. I only have HW with DataFlash connected to CS0, so I never
tested this
driver with devices connected on odher CS.
savin
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