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RE: EB40A flash impl. questions
- From: "Paul D. DeRocco" <pderocco at ix dot netcom dot com>
- To: "eCos Discuss" <ecos-discuss at ecos dot sourceware dot org>
- Date: Tue, 31 Aug 2004 16:21:46 -0700
- Subject: RE: [ECOS] EB40A flash impl. questions
@ix.netcom.com
> From: George J. Pantazopoulos
>
> What is this InverseData term?
>
> I do not see any references to pins P6 or P7 in the schematic, so what
> is meant by "I/O 6" and "I/O 7" in the flash_at49xxxx.inl file ?
>
> How does eCos determine the Busy status the the flash chip? I don't see
> a reference to CYGNUM_HAL_INTERRUPT_EXT1 (IRQ1), or to the P10 line
> shown in the schematic. It appears to use a busy loop with
> FLASH_InverseData somehow, but I dont know what InverseData is or does.
>
> Since this flash driver does not appear to use the P10/IRQ1 line (or the
> RDY/~BUSY pin on the flash chip), does this mean that I can use the IRQ1
> line for my own purposes?
>
> If this info is available somewhere, please point me in that direction.
Get the data sheet on the part from the Atmel web site, and you'll see that
it's possible to read the status of the chip from the chip itself. If the
chip is busy, reading the same location repeatedly will toggle bit 6 each
time. Once you get the same value in bit 6 twice in a row, you know the chip
has finished.
--
Ciao, Paul D. DeRocco
Paul mailto:pderocco@ix.netcom.com
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