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Re: Anyone run on Intel Xeon processor?


<kevin_lemay@agilent.com> writes:

> Nick,
> 
> The APIC is enabled by default. This is from the current Intel documentation:
> 
> The APIC global enable/disable flag in the IA32_APIC_BASE MSR
> permits the local APIC to be permanently disabled. Following a
> power-up or reset, this flag is set, enabling the local APIC. To
> permanently disable the local APIC until the next power-up or reset,
> software can clear this flag. When this flag is clear, the processor
> is functionally equivalent to an IA-32 processor without an on-chip
> APIC (for example, an Intel486 processor). In this state, CPUID
> feature flag for the APIC (bit 9 for the EDX register [see Section
> 8.4.2., "Presence of the Local APIC"]) is set to 0. Also, when the
> APIC global enable/disable flag in the IA32_APIC_BASE MSR flag has
> been cleared, it can only be reset by a power-up or RESET action.
>

I'm surprised by this. All PCs, even gazillion CPU servers, usually
come up in PIC mode for backward compatibility. It is usually the
operating system's responsibility to then switch over to the APIC when
it is ready. Maybe this is a BIOS issue: maybe you have to disable an
"SMP Operating System" option or something.

Also note that there is a difference between this bit, which seems to
simply gate the CPUID APIC present bit, and actually having the APIC
enabled, which is done with bit 8 of the APIC spurious interrupt
vector register. 


> I am going to disable it in hal_cpu_init (in pcmb.inc) if the SMP
> support is not selected. This should make everthing work.
> 
> The disable bit is in a MSR register. I do not need the address of
> the APIC to disable it.
> 

I suspect that there is some other problem with this machine and that
the APIC issue is a red herring.

-- 
Nick Garnett                    eCos Kernel Architect
http://www.ecoscentric.com      The eCos and RedBoot experts


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