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Re: ISR Sim ? / Psim ?
- From: Nick Garnett <nickg at ecoscentric dot com>
- To: Matthieu dot GIRARDIN at fr dot thalesgroup dot com
- Cc: ecos-discuss at sources dot redhat dot com
- Date: 04 Aug 2003 09:56:43 +0100
- Subject: Re: [ECOS] ISR Sim ? / Psim ?
- References: <D96E2AFA0DF3D211B13900902745494805DC2A2B@HELIOS>
Matthieu.GIRARDIN@fr.thalesgroup.com writes:
> Hello world !
>
> Just a little question from a beginner : can I simulate a interruption ?
> I mean, if I have a thread which set an ISR, can I have another one which
> set the corresponding interrupt in order to test my interrupt
> procedure ?
This depends on the hardware. If there is a software interrupt
mechanism, and the HAL supports it, then you can use that. You could
try simulating the conditions for an interrupt entry in software, but
in many architectures it is not possible to get all the CPU registers
into the same state that the hardware can.
> Another thing : I saw in the eCos doc a PowerPC simulator (psim) but the doc
> is very short on it. How can I install it and use it ? Does it works well ?
The powerpc simulator is part of the powerpc toolchain. In
powerpc-eabi-gdb use the following command line to set it up for eCos:
target sim -o '/#address-cells 1' -o '/openprom/init/register/pc 0x100' -o '/iobus@0xf0000000/reg 0xf0000000 0x01000000' -o '/iobus/pal@0xf0001000/reg 0xf0001000 32'
To avoid too much typing, put this into a macro in your ~/.gdbinit
file.
--
Nick Garnett eCos Kernel Architect
http://www.ecoscentric.com The eCos and RedBoot experts
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