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Re: ARM vector.s -- suspicious code in return_from_exception


Hi,

Well, I don?t know enough about ecos either. But after having looked at the code, I agree with you.

I am also curious about yet other piece of code (if CYGOPT_HAL_ARM_PRESERVE_SVC_SPSR is defined the follow is the final piece of code executed by return_from_exception).

// we are returning to svc mode thus we must restore the
       // pre-exception cpsr before returning to interrupted code
       msr     cpsr, r0
       ldmfd   sp, {r0-r14, pc}

Can this handle both ARM & THUMB pre-exception code?

What will happen if the T bit is set (return to THUMB pre-exception code)? Quote from ARM manuals : ? Note that the software must never change the state of the T bit in the CPSR. If this happens, the processor will enter an unpredictable state.?. Because ?ldmfd sp, {r0-r14, pc}? was compiled as ARM code & T bit is enabled before executing this.

May be this code was not intended to work with THUMB mode pre-exception code (i.e., if CYGOPT_HAL_ARM_PRESERVE_SVC_SPSR is defined, then no THUM mode execution), so that T bit is never on, when ?msr cpsr, r0? is executed. Or may be that you all are aware of it.

Cheers,
-Mike



From: "Eric de Jong" <list_ericdejong_10@gmx.net>
To: "Ecos-Discuss" <ecos-discuss@sources.redhat.com>
Subject: [ECOS] ARM vector.s   --  suspicious code in return_from_exception
Date: Mon, 23 Jun 2003 11:45:10 +0200

Hello,

In the file hal/arm/arch/current/src/vector.s (recent snapshot) I found the code
below.
Please note the line "msr spsr,r0". While it is used in an if/else case, r0
it is alway written. Unfortunate I am not familiar enough with ecos, but would
anyone take a look at it? I would guess !1! is not intended but then again this
might be a quick fix which has to be cleaned.


Eric.

vector.s line 545
        .code   32
        //
        // Return from exception
        //
return_from_exception:

        ldr     r0,[sp,#armreg_cpsr]
!1!      msr     spsr,r0

        // return to supervisor mode is simple
        and     r1,r0,#CPSR_MODE_BITS
        cmp     r1,#CPSR_SUPERVISOR_MODE

#ifndef CYGOPT_HAL_ARM_PRESERVE_SVC_SPSR
!2!      msr     spsr,r0
        ldmeqfd sp,{r0-r14,pc}^
#else
        // we must take care of not corrupting the current (svc)
        // spsr which happens to be also the pre-exception spsr
        bne     1f
        // we are returning to svc mode thus we must restore the
        // pre-exception cpsr before returning to interrupted code
!3a!      msr     cpsr, r0
        ldmfd   sp, {r0-r14, pc}
1:
        // we are not returning to svc mode thus we can safely restore
        // svc spsr
!3b!      msr     spsr, r0
#endif


----- Original Message ----- From: "QiangHuang" <jameshq@liverpool.ac.uk> To: "Ecos-Discuss" <ecos-discuss@sources.redhat.com> Sent: Friday, June 20, 2003 12:24 AM Subject: [ECOS] ARM vectors.S question. Thank you.


Hi :


   Can anyone give me some suggestion about the following code? thanks a
lot.

memory map:
    SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
    SECTION_rom_vectors (ram, 0x40000, LMA_EQ_VMA)
    SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)

ARM vectors.S
................
        ldr     r1,=__exception_handlers
        // **Question 1** Is r1 = 0x40000 here ???
..........

#ifdef CYGHWR_HAL_ARM_ICE_THREAD_SUPPORT

        ldr     r2,=ice_thread_vector
        // **Question 2** by here what is value of r2 by now, is
r2=0x20+offset(ice_thread_vector to fixed_vectors) ???? Is this Correct???

sub r2,r2,r1 // compute fixed (low memory) address
// **Question 3** if the above correct why this is needed??? what is
value of r2=r2-r1 ?? r2 = r2-0x40000??? what is going here, how the address
is defined??


        ldr     r3,=0x4D494345  // 'MICE'
        str     r3,[r2],#4
        ldr     r3,=hal_arm_ice_thread_handler
        str     r3,[r2],#4
        mov     r3,#1
        str     r3,[r2],#4
        ldr     r3,=0x47444220  // 'GDB '
        str     r3,[r2],#4
#endif // CYGHWR_HAL_ARM_ICE_THREAD_SUPPORT

Thanks a lot.


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--
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and search the list archive: http://sources.redhat.com/ml/ecos-discuss


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