RE: [ECOS] Creating eCos flash application image for AT91 EB40a Redboot

[Øyvind Harboe <oyvind dot harboe at zylin dot com>]

>Then configure it as a ROM applications, but use a 
>different .ldi file to move its ROM and RAM addresses 
>out of the way of RedBoot.

My attempt at updating the eb40a repository files to support
a new "ROMAPP" startup type failed. 

I've read in the eCos documentation that 
as an application programmer, I shouldn't normally modify the 
repository. Probably got what I deserved :-)

Here is what I did:

- updated the eb40a/current/cdl/hal_arm_at91_eb40a.cdl with a new
startup type "ROMAPP".

- duplicated eb40a/current/include/pkgconf/mlt_arm_at91_eb40a_rom.*
and updating as below

- Compiled ecos:

ecosconfig new eb40a default 
+ modify startup type to ROMAPP via configtool 
ecosconfig tree
make

Here is the error message when compiling my app:

oharboe@lair ~/myecos
$ make
arm-elf-gcc -nostartfiles -L/home/oharboe/ecos2/romapp/install/lib
-Ttarget.ld -
mcpu=arm7tdmi -mno-short-load-words -Wl,--gc-sections -Wl,-static -g
-nostdlib -
o blink blink.o
/home/oharboe/ecos-install/ecos/gnutools/arm-elf/bin/../lib/gcc-lib/arm-
elf/3.2.
1/../../../../arm-elf/bin/ld: address 0x160 of blink section
.fixed_vectors is n
ot within region ram
/home/oharboe/ecos-install/ecos/gnutools/arm-elf/bin/../lib/gcc-lib/arm-
elf/3.2.
1/../../../../arm-elf/bin/ld: address 0x4544 of blink section .data is
not withi
n region ram
/home/oharboe/ecos-install/ecos/gnutools/arm-elf/bin/../lib/gcc-lib/arm-
elf/3.2.
1/../../../../arm-elf/bin/ld: address 0x89a4 of blink section .bss is
not within
 region ram
collect2: ld returned 1 exit status
make: *** [blink] Error 1

Resulting target.ld from building ecos.

STARTUP(vectors.o)
ENTRY(reset_vector)
INPUT(extras.o)

GROUP(libtarget.a libgcc.a libsupc++.a)
MEMORY
{
    ram : ORIGIN = 0x00010000, LENGTH = 0x30000
    rom : ORIGIN = 0x01080000, LENGTH = 0x80000
}

SECTIONS
{
    .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : {
*(.debug_pubnames) } .debug_info 0 : { *(.debug_info) } .debug_abbrev 0
: { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line) } .debug_frame 0
: { *(.debug_frame) } .debug_str 0 : { *(.debug_str) } .debug_loc 0 : {
*(.debug_loc) } .debug_macinfo 0 : { *(.debug_macinfo) } .note.arm.ident
0 : { KEEP (*(.note.arm.ident)) }
    .rom_vectors 0x01080000 : { __rom_vectors_vma = ABSOLUTE(.); . = .;
KEEP (*(.vectors)) } > rom __rom_vectors_lma = LOADADDR(.rom_vectors);
    .text ALIGN (0x1) : { _stext = ABSOLUTE(.); PROVIDE (__stext =
ABSOLUTE(.)); *(.text*) *(.gnu.warning) *(.gnu.linkonce.t.*) *(.init)
*(.glue_7) *(.glue_7t) } > rom _etext = .; PROVIDE (__etext = .);
    .fini ALIGN (0x4) : { . = .; *(.fini) } > rom
    .rodata ALIGN (0x4) : { . = .; *(.rodata*) *(.gnu.linkonce.r.*) } >
rom
    .rodata1 ALIGN (0x4) : { . = .; *(.rodata1) } > rom
    .fixup ALIGN (0x4) : { . = .; *(.fixup) } > rom
    .gcc_except_table ALIGN (0x4) : { . = .; *(.gcc_except_table) } >
rom
    .fixed_vectors 0x20 : { . = .; KEEP (*(.fixed_vectors)) } > ram
    .data 0x4000 : AT ((LOADADDR (.gcc_except_table) + SIZEOF
(.gcc_except_table) + 4 - 1) & ~ (4 - 1)) { __ram_data_start = ABSOLUTE
(.); *(.data*) *(.data1) *(.gnu.linkonce.d.*) . = ALIGN (4); KEEP(*(
SORT (.ecos.table.*))) ; . = ALIGN (4); __CTOR_LIST__ = ABSOLUTE (.);
KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); __DTOR_LIST__ =
ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.);
*(.dynamic) *(.sdata*) *(.gnu.linkonce.s.*) . = ALIGN (4); *(.2ram.*) }
> ram __rom_data_start = LOADADDR (.data); __ram_data_end = .; PROVIDE
(__ram_data_end = .); _edata = .; PROVIDE (edata = .); PROVIDE
(__rom_data_end = LOADADDR (.data) + SIZEOF(.data));
    .bss ALIGN (0x4) : { __bss_start = ABSOLUTE (.); *(.scommon)
*(.dynsbss) *(.sbss*) *(.gnu.linkonce.sb.*) *(.dynbss) *(.bss*)
*(.gnu.linkonce.b.*) *(COMMON) __bss_end = ABSOLUTE (.); } > ram
    __heap1 = ALIGN (0x8);
    . = ALIGN(4); _end = .; PROVIDE (end = .);
}


// eCos memory layout - Wed Apr 11 13:49:55 2001

// This is a generated file - do not edit

#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>

#endif
#define CYGMEM_REGION_ram (0x00010000)
#define CYGMEM_REGION_ram_SIZE (0x00030000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R |
CYGMEM_REGION_ATTR_W)
#define CYGMEM_REGION_rom (0x01080000)
#define CYGMEM_REGION_rom_SIZE (0x00080000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x00030000 - (size_t) CYG_LABEL_NAME
(__heap\
1))



// eCos memory layout - Wed Apr 11 13:49:55 2001

// This is a generated file - do not edit

#include <cyg/infra/cyg_type.inc>

MEMORY
{
    ram  : ORIGIN = 0x00010000, LENGTH = 0x30000
    rom  : ORIGIN = 0x01080000, LENGTH = 0x80000
}

SECTIONS
{
    SECTIONS_BEGIN
    SECTION_rom_vectors (rom, 0x01080000, LMA_EQ_VMA)
    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
    SECTION_data (ram, 0x4000, FOLLOWING (.gcc_except_table))
    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
    SECTIONS_END
}




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