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Re: Is SMP-eCos SMP wrt interrupt processing?


sandeep <sandeep@codito.com> writes:

> hi,
> Is SMP-eCos SMP regards to interrupts processing too, in the sense of, are all
> the interrupts are enabled for all the processors
> and any of the processor can process any of the interrupts?
> OR
> the design is bit asymmetric wrt interrupt processing, in the sense that certain
> interrupts are enabled only for specific processor(s)
> and only those are allowed to service them.

As Andrew pointed out, there is SMP.txt in the kernel
documentation. Most of the contents of this file has now been
incorporated into the main SGML documentation, so this file may not be
the very latest on the subject.

SMP in eCos remains experimental and only one target is supported. The
API, both at kernel and HAL level, will support any sort of interrupt
routing and control needed. However, it all relies on the actual
interrupt controllers and how they work and how much is supported in
the HAL. The current PC implementation only supports routing of
interrupts to specific CPUs, and not dynamic routing. 

-- 
Nick Garnett - eCos Kernel Architect
http://www.eCosCentric.com/


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