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nested interrupt


Hi,all!
following question is based on ARM arch.

In ecos, when a lower level interrupt occur it will execute

IRQ:
// Note: I use this exception stack while saving the context because
// the current SP does not seem to be always valid in this CPU mode.
ldr sp,.__exception_stack // get good stack
sub lr,lr,#4 // PC at time of interrupt
stmfd sp!,{r0,fp,ip,lr} mrs r0,spsr
stmfd sp!,{r0}

handle_IRQ_or_FIQ: mov ip,sp // save SP which will vanish with
........
........

mov sp,ip
ldr lr,[sp,#armreg_pc]
ldr r0,[sp,#armreg_cpsr]
ldr ip,[sp,#armreg_ip]
msr spsr,r0
ldmfd sp,{r0-r10,fp}
movs pc,lr // restore PC from LR, CPSR from SPSR

And this time,
a high level interrupt occurs

it will execute the above code again. and the previous stack area will be destroy, the system will be down, Is it right???



Best Regards
By david,




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