[ECOS] porting to ARM7TDMI : problem with memory layout

[Dominic Giroux <dgiroux at softacoustik dot com>]

Hi,

I am using ecos Configuration Tool 1.3.net and I'm porting ecos to our own

platform which is ARM based (Atmel AT91FR4081, ARM7TDMI core). Here is my

memory layout :

 

pri_sram : ORIGIN = 0x00000000, LENGTH = 0x2000

sec_sram : ORIGIN = 0x00100000, LENGTH = 0x20000

flash : ORIGIN = 0x01000000, LENGTH = 0x100000

 

The memory region from 0x01000000 to 0x01020040 is reserved for our own

boot program

 

The problem is that when I'm linking ecos with my project, the following

error occurs :

 

arm-elf-ld: section .text [01020040 -> 01024c9b] overlaps section .rom_vectors [01020040 -> 0102007f]

make: *** [main.elf] Error 1

Error executing make.

 

Any idea as to what could cause this error?

 

the contents of the file mlt,ldi and target.ld(attachement) are the following :

 

// -----------------------------

// MLT

// -----------------------------

version 0

region pri_sram 0 2000 0 !

region sec_ram 00100000 20000 0 !

region flash 01000000 100000 1 !

section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !

section data 0 1 1 1 1 1 0 0 00100000 bss !

section bss 0 4 0 1 0 1 0 1 heap1 heap1 !

section heap1 0 8 0 0 0 0 0 0 !

section reserved_bootmon 20040 1 0 0 1 1 1 1 01000000 01000000 rom_vectors rom_vectors !

section rom_vectors 0 8 0 1 0 1 0 1 text text !

section text 0 4 0 1 0 1 0 1 fini fini !

section fini 0 4 0 1 0 1 0 1 rodata rodata !

section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !

section rodata1 0 4 0 1 0 1 0 1 fixup fixup !

section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !

section gcc_except_table 0 4 0 1 0 0 0 1 data !

 

// -----------------------------

// LDI

// -----------------------------

// eCos memory layout - Wed Apr 11 13:49:55 2001

 

// This is a generated file - do not edit

 

#include <cyg/infra/cyg_type.inc>

 

MEMORY

{

    pri_sram : ORIGIN = 0x00000000, LENGTH = 0x2000

    sec_sram : ORIGIN = 0x00100000, LENGTH = 0x20000

    flash    : ORIGIN = 0x01000000, LENGTH = 0x100000

}

 

SECTIONS

{

    SECTIONS_BEGIN

    CYG_LABEL_DEFN(__reserved_bootmon) = 0x01000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x20040;

    SECTION_rom_vectors (flash, ALIGN (0x8), LMA_EQ_VMA)

    SECTION_text (flash, ALIGN (0x1), LMA_EQ_VMA)

    SECTION_fini (flash, ALIGN (0x4), LMA_EQ_VMA)

    SECTION_rodata (flash, ALIGN (0x4), LMA_EQ_VMA)

    SECTION_rodata1 (flash, ALIGN (0x4), LMA_EQ_VMA)

    SECTION_fixup (flash, ALIGN (0x4), LMA_EQ_VMA)

    SECTION_gcc_except_table (flash, ALIGN (0x4), LMA_EQ_VMA)

    SECTION_fixed_vectors (pri_sram, 0x20, LMA_EQ_VMA)

    SECTION_data (sec_sram, 0x02000000, FOLLOWING (.gcc_except_table))

    SECTION_bss (sec_sram, ALIGN (0x4), LMA_EQ_VMA)

    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);

    SECTIONS_END

}

 

 

Dominic Giroux

Embedded Software Engineer

Tel : (418) 521-1515 ext 234

email : dgiroux@softacoustik.com

 

 

Attachment: target.ld
Description: Binary data

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