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Re: mips: address error after break


> When restarting after a breakpoint, the target gets stepped one instruction
> before really being continued. Perhaps your CPU has opcodes or opcode
> formats not covered by __single_step() in
> hal/mips/arch/VERSION/src/mips-stub.c?
> 
> Jifl
> -- 

Thanks, Jonathan.

I finally found the cause of this problem. The immediate cause is that 
the upper 32 bits of general registers are made zero during copying 
registers[] to HAL_SavedRegisters since target_register_t was still 
unsigned long. On the other side, general registers were handled by double 
word store and load in vectors.S. Thus the upper 32 bits of general registers 
were all zero at the restoration from exception. Since the latest code 
seems to support 64bit mode, this problem may not occur.

Motoya Kurotsu
Allied Telesis K.K.


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