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can not get EDB7212 to warm reset in RAM build
- To: <ecos-discuss at sourceware dot cygnus dot com>
- Subject: [ECOS] can not get EDB7212 to warm reset in RAM build
- From: AshCan at aol dot com
- Date: Tue, 26 Sep 2000 16:07:53 EDT
I am trying to make my RAM based system perform a warm
reset upon a application specific condition. I trap my
condition OK, but when I jump to reset_vector (also
tried reset_platform, warm_reset, start).
I have set the cpsr register FIQ, IRQ and supervisor
mode bits (0x13).
After I branch to reset_vector in vectors.S, I was
getting stuck at start where init_flag is tested.
Since init_flag was changed the first time through, I
get stuck, so I commented out the test.
This lets me get further, but not back to cyg_start. I get stuck in the following stack frame:
startup_stack_base
cyg_hal_invoke_constructors
cyg_HardwareThread
static_initialization_and_destruction
14Cyg_IdleThreadPFU_vUiUiUi
10Cyg_ThreadUiFPUi_vUiPcUiUi
1) Is there an easier way to do this?
2) I am guessing the code commenting a start is not
safe, so how can I get it to warm reset and uncomment
that code back in.
thank you,
Dan Ash
SonicBox