[ECOS] error of making rom image

["Jerry Yan" <jerry at micetek dot com>]

Hello All, 
I want to build a rom image of eCos for 860 MBX board, but the error as the following is reported. 

/tools/H-i686-pc-cygwin/powerpc-eabi/bin/ld: address 0xfe00afe8 of file://J/ecos/examples/rom_install/tests/hal/powerpc/mpc8xx/v1_3_1/tests/intr0.exe section .data is not within region ram
/tools/H-i686-pc-cygwin/powerpc-eabi/bin/ld: address 0xfe00aff8 of file://J/ecos/examples/rom_install/tests/hal/powerpc/mpc8xx/v1_3_1/tests/intr0.exe section .sbss is not within region ram
/tools/H-i686-pc-cygwin/powerpc-eabi/bin/ld: address 0xfe00c9a0 of file://J/ecos/examples/rom_install/tests/hal/powerpc/mpc8xx/v1_3_1/tests/intr0.exe section .bss is not within region ram
collect2: ld returned 1 exit status
make[1]: *** [//J/ecos/examples/rom_install/tests/hal/powerpc/mpc8xx/v1_3_1/tests/intr0] Error 1 

Who can help me? 

My target.ld likes the following: 

MEMORY
{
    ram : ORIGIN = 0, LENGTH = 0x400000
    rom : ORIGIN = 0xfe000000, LENGTH = 0x800000
}

STARTUP(vectors.o)
ENTRY(__exception_reset)

INPUT(extras.o)

GROUP(libtarget.a libgcc.a)

SECTIONS
{
     
    .vectors   0xfe000000  :      { . = . ; KEEP(*(.vectors)) } >  rom  
    .text   ALIGN (0x4)  :      { _stext = .; *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } >  rom  _etext = .;  PROVIDE (etext = .); 
    .fini   ALIGN (0x4)  :      { . = . ; *(.fini) } >  rom  
    .rodata1   ALIGN (0x8)  :      { . = . ; *(.rodata1) } >  rom  
    .rodata   ALIGN (0x8)  :      { . = . ; *(.rodata*) } >  rom  
    .fixup   ALIGN (0x4)  :      { __FIXUP_START__ = ABSOLUTE(.); *(.fixup) __FIXUP_END__ = ABSOLUTE(.);} >  rom  
    .gcc_except_table   ALIGN (0x1)  :      { __EXCEPT_START__ = ABSOLUTE(.); *(.gcc_except_table) __EXCEPT_END__ = ABSOLUTE(.);} >  rom  
    .data   ALIGN (0x10)  :      { __ram_data_start = ABSOLUTE(.); *(.data*) __GOT1_START__ = ABSOLUTE(.); *(.got1) __GOT1_END__ = ABSOLUTE(.); . = ALIGN(8); __CTOR_LIST__ = ABSOLUTE(.); KEEP(*(SORT(.ctors*))) __CTOR_END__ = ABSOLUTE(.); __DTOR_LIST__ = ABSOLUTE(.); KEEP(*(SORT(.dtors*))) __DTOR_END__ = ABSOLUTE(.); . = ALIGN(8); __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); __NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) __NETDEVTAB_END__ = ABSOLUTE (.); __GOT2_START__ = ABSOLUTE(.); *(.got2) __GOT2_END__ = ABSOLUTE(.); __GOT_START = ABSOLUTE(.); _GLOBAL_OFFSET_TABLE_ = ABSOLUTE(. + 32768); _SDA_BASE_ = ABSOLUTE(.); *(.got.plt) *(.got) __GOT_END__ = ABSOLUTE(.);  *(.dynamic) __SDATA_START__ = ABSOLUTE(.); *(.sdata) __SDATA2_START__ = ABSOLUTE(.); *(.sdata2) } >  rom  __rom_data_start = LOADADDR(.data); __ram_data_end = .; PROVIDE(__ram_data_end = .); _edata = .; PROVIDE (edata = .); 
    .sbss   ALIGN (0x4)  :      { __sbss_start = ABSOLUTE (.); __SBSS_START__ = ABSOLUTE(.); *(.sbss) __SBSS_END__ = ABSOLUTE(.); __SBSS2_START__ = ABSOLUTE(.); *(.sbss2) __SBSS2_END__ = ABSOLUTE(.); *(.scommon) __sbss_end = ABSOLUTE (.); } >  rom  
    .bss   ALIGN (0x10)  :      { __bss_start = ABSOLUTE (.); . = . ; *(.dynbss) *(.bss) *(COMMON) __bss_end = ABSOLUTE (.); } >  rom  
    __reserved_vectors = 0; . = __reserved_vectors + 0x3000;
    __reserved_vsr_table = ALIGN (0x4); . = __reserved_vsr_table + 0x200;
    .data   ALIGN (0x10)  :      { __ram_data_start = ABSOLUTE(.); *(.data*) __GOT1_START__ = ABSOLUTE(.); *(.got1) __GOT1_END__ = ABSOLUTE(.); . = ALIGN(8); __CTOR_LIST__ = ABSOLUTE(.); KEEP(*(SORT(.ctors*))) __CTOR_END__ = ABSOLUTE(.); __DTOR_LIST__ = ABSOLUTE(.); KEEP(*(SORT(.dtors*))) __DTOR_END__ = ABSOLUTE(.); . = ALIGN(8); __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); __NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) __NETDEVTAB_END__ = ABSOLUTE (.); __GOT2_START__ = ABSOLUTE(.); *(.got2) __GOT2_END__ = ABSOLUTE(.); __GOT_START = ABSOLUTE(.); _GLOBAL_OFFSET_TABLE_ = ABSOLUTE(. + 32768); _SDA_BASE_ = ABSOLUTE(.); *(.got.plt) *(.got) __GOT_END__ = ABSOLUTE(.);  *(.dynamic) __SDATA_START__ = ABSOLUTE(.); *(.sdata) __SDATA2_START__ = ABSOLUTE(.); *(.sdata2) } >  ram  __rom_data_start = LOADADDR(.data); __ram_data_end = .; PROVIDE(__ram_data_end = .); _edata = .; PROVIDE (edata = .); 
    .sbss   ALIGN (0x4)  :      { __sbss_start = ABSOLUTE (.); __SBSS_START__ = ABSOLUTE(.); *(.sbss) __SBSS_END__ = ABSOLUTE(.); __SBSS2_START__ = ABSOLUTE(.); *(.sbss2) __SBSS2_END__ = ABSOLUTE(.); *(.scommon) __sbss_end = ABSOLUTE (.); } >  ram  
    .bss   ALIGN (0x10)  :      { __bss_start = ABSOLUTE (.); . = . ; *(.dynbss) *(.bss) *(COMMON) __bss_end = ABSOLUTE (.); } >  ram  
    . = ALIGN(4); _end = .; PROVIDE (end = .); 
}

hal_vsr_table = 0x3000;
 



Thanks a lot , 

Jerry