Re: [ECOS] Why "Spurious Interrupt" complaint?

[Grant Edwards <grante at visi dot com>]

On Fri, Nov 05, 1999 at 11:34:35AM -0000, Alex Schuilenburg wrote:

> >    Spurious Interrupt!!! - vector: 12, data: 0
> >
> > Clues?
> 
> Do you power-cycle or reset the board between running the tests?  We have
> seen this kind of problem before between running tests when the board is not
> reset correctly after running a test.  The previous test leaves some state
> behind which the following test pick up on.

I think that's the problem.  I found out two things:

 a) The EPI Jeeni JTAG interface doesn't actually drive the reset line
    on the JTAG connector active when you send it a reset command.
    This is odd, since the manual for the EPI Jeeni contains several
    pages on how to design target hardware to correctly handle said
    reset line.

 b) The Samsung Eval board doesn't connect the reset line on the JTAG header to
    the correct pin on the uController anyway, so a) is a moot point
    until I get real target hardware from the hardware guys.

> The worst case is that the board can crash when you download to it (because
> you end up over-writing code & vectors that are currently in use :-/

I think I'll add some stuff to my "load program" macro to put the CPU
into a predictiable, benign state.

Thanks for the clue!

-- 
Grant Edwards
grante@visi.com