Re: Synth NAND Flash

[Rutger Hofman <rutger at cs dot vu dot nl>]

Simon Kallweit wrote:
> Simon Kallweit wrote:
> > Now for the actual design of the synth driver. I think the best way 
> > would be to implement a NAND simulator based on the ONFI 
> > specification. Something similar has been done for the MTD framework, 
> > but I guess other than for inspiration we're not allowed to use that 
> > code. So basically we would simulate the interface to the chip. I 
> > guess we don't have to simulate the signal lines. We just need some 
> > mechanism for chipselect and reset I guess. The interface will more be 
> > along the lines of writing commands, addresses, reading back etc. This 
> > means that the simulator will be implemented as a state machine. There 
> > is even one described in the ONFI specification for reference.
>
> Well after some more thought it's probably a better idea to keep the 
> interface to the NAND chip simulator very close to the hardware. That 
> means, a function for setting signal lines (CE, CLE, ALE, WP) as well as 
> two functions for read and write access.

See my suggestion on a NAND chip simulator in my previous mail. Having 
it be accessed using the control lines is the right way to go IMHO: this 
is where the package boundary/API for NAND chips is.

> I don't intend to support multiple LUNs for the moment, just to keep it 
> simple.
>
> I have already done the interface to the NAND chip simulator. This seems 
> to work fine. I'll keep you updated.

I'm looking forward!

Rutger