SID sample execution error

[Curtis Whitley <cwhitley at outsitenetworks dot com>]

I am trying to use the SID simulator to test some eCos application code
(which is yet to be written). For starters, I am trying to setup SID.

After much work trying to fix various errors in order to get SID built
under Redhat WS 3 (kernel 2.4), I reached the point where SID is trying
to run, but gets some errors. The command is "sid sid.conf". The
contents of "sid.conf" are further below. That file was created with the
arm-elf-sid Tcl script, but I had to modify its library references to
get a bunch of errors fixed.

arm-elf-sid --cpu arm --board=pid7t-normalstop --gdb=2000 -EL --tksm
--no-run

Here are the current errors:

---------------

sid.conf:50: component type sid-control-tksm unknown
sid.conf:56: component type bridge-tcl unknown
sid.conf:141: component tksm not found
sid.conf:145: component tksm not found
sid.conf:154: component tksm not found
sid.conf:162: component tcl-event-consumer not found
sid.conf:163: component tcl-event-consumer not found
sid.conf:164: component tcl-event-consumer not found
Configuration error.  Aborting.

---------------

I searched through the SID sources and the "sid-control-tksm" is defined
as a text string in the code. It is part of the libtclapi.la library.

Anyone have any idea how to resolve these errors? The contents of
"sid.conf" are shown below. Note that I modified the load commands
to resolve references to the libraries. The paths were wrong.

-------------------------

# sid configuration file
# created by Id: configrun-sid.in,v 1.35 2003/10/21 21:27:41 brolley Exp
# run by root @ localhost.localdomain (Linux) at Tue Oct 26 10:14:14 EDT
2004
# args: --cpu arm --board=pid7t-normalstop --gdb=2000 -EL --tksm
--no-run
load /home/curtis/sid-cvs/build/sid/component/audio/.libs/libaudio.la
audio_component_library
load /home/curtis/sid-cvs/build/sid/component/cache/.libs/libcache.la
cache_component_library
load
/home/curtis/sid-cvs/build/sid/component/cgen-cpu/.libs/libcgencpu.la
cgen_component_library
load
/home/curtis/sid-cvs/build/sid/component/consoles/.libs/libconsoles.la
console_component_library
load /home/curtis/sid-cvs/build/sid/component/gdb/.libs/libgdb.la
gdb_component_library
load /home/curtis/sid-cvs/build/sid/component/gloss/.libs/libgloss.la
gloss_component_library
load /home/curtis/sid-cvs/build/sid/component/glue/.libs/libglue.la
glue_component_library
load /home/curtis/sid-cvs/build/sid/component/lcd/.libs/libhd44780u.la
hd44780u_component_library
load /home/curtis/sid-cvs/build/sid/component/ide/.libs/libide.la
ide_component_library
load
/home/curtis/sid-cvs/build/sid/component/interrupt/.libs/libinterrupt.la
interrupt_component_library
load /home/curtis/sid-cvs/build/sid/component/loader/.libs/libloader.la
loader_component_library
load /home/curtis/sid-cvs/build/sid/component/mapper/.libs/libmapper.la
mapper_component_library
load /home/curtis/sid-cvs/build/sid/component/memory/.libs/libmemory.la
mem_component_library
load /home/curtis/sid-cvs/build/sid/component/mmu/.libs/libmmu.la
mmu_component_library
load
/home/curtis/sid-cvs/build/sid/component/parport/.libs/libparport.la
parport_component_library
load /home/curtis/sid-cvs/build/sid/component/profiling/.libs/libprof.la
prof_component_library
load /home/curtis/sid-cvs/build/sid/component/rtc/.libs/librtc.la
rtc_component_library
load /home/curtis/sid-cvs/build/sid/component/sched/.libs/libsched.la
sched_component_library
load /home/curtis/sid-cvs/build/sid/component/tcl/.libs/libtclapi.la
tcl_bridge_library
load /home/curtis/sid-cvs/build/sid/component/timers/.libs/libtimers.la
timer_component_library
load /home/curtis/sid-cvs/build/sid/component/uart/.libs/libuart.la
uart_component_library
load /home/curtis/sid-cvs/build/sid/component/bochs/.libs/libx86.la
x86_component_library
set main persistent? true
# first section
new hw-cpu-arm7t cpu
new hw-mapper-basic cpu-mapper
new hw-glue-sequence-8 init-sequence
new hw-glue-sequence-1 hw-reset-net
new hw-glue-sequence-8 deinit-sequence
new hw-glue-sequence-1 yield-net
new hw-glue-sequence-2 cache-flush-net
new sid-sched-host-accurate host-sched
new sid-sched-sim target-sched
# pid7t components
new hw-remap/pause-arm/ref remapper
new hw-timer-arm/ref-sched timer1
new hw-timer-arm/ref-sched timer2
new hw-interrupt-arm/ref intctrl
new hw-uart-ns16550 uart1
new hw-uart-ns16550 uart2
new hw-parport-ps/2 parport
# cpu gdb
new sw-debug-gdb cpu-gdb
new sid-io-socket-server cpu-gdb-socket
# tk system monitor
new sid-control-tksm tksm
# memory region 1 (0x00000000,0x01000000)
new hw-memory-ram/rom-basic mem1
# memory region 2 (0x04000000,0x00100000)
new hw-memory-ram/rom-basic mem2
# tcl/tk adaptive event polling
new bridge-tcl tcl-event-consumer
# second section
# settings
set cpu step-insn-count 10000
set host-sched num-clients 10 # large enough?
set target-sched num-clients 10 # large enough?
# pin connections
connect-pin main perform-activity -> host-sched advance
connect-pin main perform-activity -> target-sched advance
connect-pin main starting -> init-sequence input
connect-pin main stopping -> deinit-sequence input
connect-pin init-sequence output-0 -> hw-reset-net input
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
connect-pin target-sched time-query <- cpu time-query
connect-pin target-sched time-high -> cpu time-high
connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-bus cpu data-memory cpu-mapper access-port
# pid7t control connections
connect-pin target-sched 2-control <- timer1 divided-clock-control
connect-pin target-sched 2-event -> timer1 divided-clock-event
set target-sched 2-scale 1/4  # artificial speed-up
connect-pin timer1 interrupt -> intctrl interrupt-source-4
connect-pin target-sched 3-control <- timer2 divided-clock-control
connect-pin target-sched 3-event -> timer2 divided-clock-event
set target-sched 3-scale 1/4  # artificial speed-up
connect-pin timer2 interrupt -> intctrl interrupt-source-5
connect-pin intctrl interrupt -> cpu nirq
connect-pin intctrl fast-interrupt -> cpu nfiq
connect-pin hw-reset-net output-0 -> uart1 Reset
connect-pin hw-reset-net output-0 -> uart2 Reset
connect-pin hw-reset-net output-0 -> intctrl reset
connect-pin hw-reset-net output-0 -> timer1 reset
connect-pin hw-reset-net output-0 -> timer2 reset
connect-pin uart1 INTR -> intctrl interrupt-source-8
connect-pin uart2 INTR -> intctrl interrupt-source-9
connect-pin parport INTP -> intctrl interrupt-source-10
# pid7t memory map
connect-bus cpu-mapper intctrl:[0xA000000,0xA000013] intctrl
irq-registers
connect-bus cpu-mapper intctrl:[0xA000100,0xA00010F] intctrl
fiq-registers
connect-bus cpu-mapper timer1:[0xA800000,0xA80000F] timer1 registers
connect-bus cpu-mapper timer2:[0xA800020,0xA80002F] timer2 registers
connect-bus cpu-mapper remapper:[0xB000000,0xB000037] remapper registers
connect-bus cpu-mapper uart1:[0xD800000,0xD80001F,4,1] uart1 Bus
connect-bus cpu-mapper uart2:[0xD800020,0xD80003F,4,1] uart2 Bus
connect-bus cpu-mapper parport:[0xD800040,0xD80005F,4,1] parport Bus
# set uart unframed mode
set uart1 sio-framing? 0
set uart2 sio-framing? 0
# remapper configuration
# NB: remapping polarity is opposite to document
set remapper num-relocations 1
set remapper 0-start 0x0
set remapper 0-end 0xFFFF
set remapper 0-reloc-to 0x04000000
set cpu engine-type pbb
# cpu-gdb
relate cpu-gdb cpu cpu
relate cpu-gdb cfgroot main
relate cpu-gdb target-schedulers target-sched
relate cpu-gdb host-schedulers host-sched
connect-pin cpu-gdb process-signal -> main stop!
connect-pin init-sequence output-3 -> cpu-gdb init
connect-pin deinit-sequence output-5 -> cpu-gdb deinit
connect-pin cpu-gdb yield -> yield-net input
connect-pin cpu-gdb flush-icache -> cache-flush-net input
connect-pin cache-flush-net output-1 -> cpu flush-icache
connect-pin cpu-gdb restart -> hw-reset-net input
set cpu-gdb exit-on-detach? 1
# cpu-gdb-socket
connect-pin init-sequence output-2 -> cpu-gdb-socket init
connect-pin deinit-sequence output-6 -> cpu-gdb-socket fini
connect-pin cpu-gdb-socket rx -> cpu-gdb remote-rx
connect-pin cpu-gdb-socket tx <- cpu-gdb remote-tx
connect-pin host-sched 6-event -> cpu-gdb-socket poll-event
connect-pin host-sched 6-control <- cpu-gdb-socket poll-control
set cpu-gdb-socket sockaddr-local 0.0.0.0:2000
# gdb w/o gloss
connect-pin cpu trap <-> cpu-gdb trap
connect-pin cpu trap-code -> cpu-gdb trap-code
# tk system monitor
relate main component-catalog-informees tksm
# refresh
set host-sched 1-regular? 1
set host-sched 1-time 1000
connect-pin host-sched 1-event -> tksm refresh
# remapper reconnection
connect-bus remapper all cpu-mapper access-port
disconnect-bus cpu insn-memory cpu-mapper access-port
connect-bus cpu insn-memory remapper access-port
disconnect-bus cpu data-memory cpu-mapper access-port
connect-bus cpu data-memory remapper access-port
set cpu endian little
# triggerpoint signal
connect-pin tksm triggerpoint-hit -> cpu-gdb stop-target
# memory region 1 (0x00000000,0x01000000) configuration
set mem1 size 16777216
connect-bus cpu-mapper mem1:[0,16777215] mem1 read-write-port
# memory region 2 (0x04000000,0x00100000) configuration
set mem2 size 1048576
connect-bus cpu-mapper mem2:[67108864,68157439] mem2 read-write-port
# tcl/tk adaptive event polling
connect-pin host-sched 2-event -> tcl-event-consumer !event
connect-pin host-sched 2-control <- tcl-event-consumer !event-control
connect-pin init-sequence output-7 -> tcl-event-consumer !event

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