This is the mail archive of the ecos-bugs@sourceware.org mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug 1001133] New: STM32 SPI APB1 and APB2 bus clock frequency issue


Please do not reply to this email. Use the web interface provided at:
http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001133

           Summary: STM32 SPI APB1 and APB2 bus clock frequency issue
           Product: eCos
           Version: unknown
          Platform: All
        OS/Version: Cortex-M
            Status: UNCONFIRMED
          Severity: minor
          Priority: low
         Component: SPI
        AssignedTo: unassigned@bugs.ecos.sourceware.org
        ReportedBy: martin.blaser@intefo.ch
                CC: ecos-bugs@ecos.sourceware.org
             Class: Advice Request


The STM32 SPI driver implementation calculates the bus clock frequencies APB1
and APB2 with two #define. These defines do not consider that the HSE input
clock could be divided by 2
(CYGHWR_HAL_CORTEXM_STM32_CLOCK_PLL_SOURCE_HSE_HALF). If this option is
enabled, the frequencies are too high.

-- 
Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]