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[Bug 1001133] New: STM32 SPI APB1 and APB2 bus clock frequency issue
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-bugs at ecos dot sourceware dot org
- Date: Thu, 27 Jan 2011 13:53:10 +0000
- Subject: [Bug 1001133] New: STM32 SPI APB1 and APB2 bus clock frequency issue
- Auto-submitted: auto-generated
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Summary: STM32 SPI APB1 and APB2 bus clock frequency issue
Product: eCos
Version: unknown
Platform: All
OS/Version: Cortex-M
Status: UNCONFIRMED
Severity: minor
Priority: low
Component: SPI
AssignedTo: unassigned@bugs.ecos.sourceware.org
ReportedBy: martin.blaser@intefo.ch
CC: ecos-bugs@ecos.sourceware.org
Class: Advice Request
The STM32 SPI driver implementation calculates the bus clock frequencies APB1
and APB2 with two #define. These defines do not consider that the HSE input
clock could be divided by 2
(CYGHWR_HAL_CORTEXM_STM32_CLOCK_PLL_SOURCE_HSE_HALF). If this option is
enabled, the frequencies are too high.
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