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References: <528646bc05012715092fd0c5ad@mail.gmail.com> Archived-at: http://www.cygwin.com/ml/crossgcc/2005-01/msg00093.html Hi On June 28 a set of patches was achieved to add working support for the Cirrus MaverickCrunch FP coprocessor to gcc-4.1.2 and 4.2.0, present in http://files.futaris.org/gcc/crunch.tar.bz2 The patches are in the archive's subdirs gcc/gcc-4.1.2 and gcc/gcc-4.2.0; there are other patches in those dirs as that are alternative versions or unused; see the corresponding gcc/gcc-4.1.2/4.2.0.bb files for a list of which ones to apply. GCC flags to enable this in a softfloat environment are: -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp I've tried these (in a native compilation, not with crosstool), and LAME encoding of a test piece speeds up from 6m11s (using softfloat) to 2m30s. An fftw benchmark instead reports an increase in BogoMIPS from 2.30 (softfloat) to 5.37 (gcc-4.1.2) and 5.635 (gcc-4.2.0) on a 200MHz board. The patches' author claims to have run the gcc ieee754 testsuite with 100% success, and my own tests show no difference in programs' output (you just get it sooner :) The only penalty is that when generation of Maverick hardfloat instructions is enabled, generation of conditional ARM instructions other than branches is disabled (bcos the Maverick instructions set the conditions codes differently from the equivalent ARM instructions), though in practice those optimisations seem to be of negligable effect. More could be done in this direction (see http://gcc.gnu.org/ml/gcc/2007-06/msg00938.html and followups) but these patches have sat for a few months and are currently the only working set AFAIK. M -- For unsubscribe information see http://sourceware.org/lists.html#faq
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