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Hi All, I'm using the gcc 3.0.4 with newlib10 for the ARM (ARM7tdmi core) the following C code generates the ASM interrupt handler below: It seems to me that the first statement mov ip,sp is wrong. The ip (R12) is not a banked register. This handler seems to trash the the soft-float math pack. Am I missing something about how the register are used? Thanks Richard Slaughter void test_irq(void) __attribute__ ((interrupt("IRQ"))); void test_irq(void) {;} @ Generated by gcc 3.0.4 for ARM/elf .file "hw.i" .text .align 2 .global test_irq .type test_irq,function test_irq: @ Interrupt Service Routine. @ args = 0, pretend = 0, frame = 0 @ frame_needed = 1, current_function_anonymous_args = 0 mov ip, sp stmfd sp!, {fp, ip, lr, pc} sub fp, ip, #4 ldmea fp, {fp, sp, lr} subs pc, lr, #4 ===== __________________________________________________ Do You Yahoo!? Yahoo! Tax Center - online filing with TurboTax http://taxes.yahoo.com/ ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com
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