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Re: ISR-support in ARM

From: Philip Blundell <pb at nexus dot co dot uk>
To: kai dot ruottu at luukku dot com
Cc: Richard Slaughter <rslaughter at anatel dot com>, crossgcc at sourceware dot cygnus dot com, ananda dot motte at philips dot com
Date: Wed, 14 Nov 2001 15:59:40 +0000
Subject: Re: ISR-support in ARM
References: <24951362.1004290733102.JavaMail.hip-pop@porkkana> <3BEFB38B.894F2CB4@luukku.com> <27691363.1005648169466.JavaMail.hip-pop@porkkana> <3BF105C8.E4A7451@luukku.com> <7579996.1005735130019.JavaMail.hip-pop@porkkana> <3BF276EE.FCB487C6@luukku.com>

> The clause in the comment:
>
>       Interrupt routines have their own banked link register,
>       so they never need to save it.
>
>sounds more than weird when the link-register is one of the registers to be
>used as workspace... Or is the 'lr' in the opcode :

Oh, I see.  Yes, I think you're right.  It looks like the person who wrote the 
comment (and the code) misunderstood how ARM banked registers work.

p.


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References:
- ISR-support in ARM
  - From: Kai Ruottu
- Re: ISR-support in ARM
  - From: Kai Ruottu
- Re: ISR-support in ARM
  - From: Kai Ruottu

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