This is the mail archive of the crossgcc@cygnus.com mailing list for the crossgcc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: FW: Results of "downloading compressed program images" request


>>>>> "Richard" == Richard Stallman <rms@santafe.edu> writes:

>>>>>>> "Rj" == Robert J. Brown <rj@eli.elilabs.com> wrote:

    Rj>     So when will the FSF start addressing the development
    Rj> of hardware?  There is already a Verilog simulation
    Rj> system available under GPL or some other free software
    Rj> arrangement.  What is needed is a systhesizer, which is
    Rj> the tool that converts the HDL to a netlist of low level
    Rj> gates, somewhat like the code generation phase of a
    Rj> software compiler, and a floorplanning tool, which
    Rj> essentially does the job of a linking loader for
    Rj> hardware.

    Richard> Most work on the GNU project is done by volunteers.
    Richard> Circuit design is a rather specialized application, so we
    Richard> won't be spending funds on it; we have to wait for
    Richard> volunteers to do it.

I know at least some of the efforts for porting the gcc/gdb team to
certain hosts/targets was done with funds donated by businesses that
would benefit from having such ports available.  Do you suppose that
some of the FPGA vendors might likewise benefit from a GPLed simulator 
and synthesizer, and that they might donate to the work of producing
such? 

-- 
--------  "And there came a writing to him from Elijah"  [2Ch 21:12]  --------
Robert Jay Brown III rj@eli.elilabs.com  http://www.elilabs.com 1 847 705-0424
Elijah Laboratories Inc.;  37 South Greenwood Avenue;  Palatine, IL 60067-6328
-----  M o d e l i n g   t h e   M e t h o d s   o f   t h e   M i n d  ------