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xc16x.cpu insn issues
- From: Doug Evans <dje at sebabeach dot org>
- To: cgen at sourceware dot org
- Date: Thu, 18 Jun 2009 10:54:34 -0700
- Subject: xc16x.cpu insn issues
Hi.
After adding (nop) to the "nop" instruction, I found a few other
instructions with missing semantics.
For now we could just make them all nops, and add FIXME's for srstm,etc.
I also found the "prior" insn with invalid semantics.
What should these insns be?
(define-pmacro (sysctrl name insn opc1 opc2 op1 op2 op3)
(dni name
(.str name "miscellaneous" )
((PIPE OS) (IDOC MISC))
(.str insn )
(+ opc1 opc2 (f-op-lbit4 op1) (f-op-bit4 op2) (f-data8 op3)
(f-op-bit8 op3))
(???) <<<
()
)
)
(sysctrl srstm srst OP1_11 OP2_7 4 8 183 )
(sysctrl idlem idle OP1_8 OP2_7 7 8 135)
(sysctrl pwrdnm pwrdn OP1_9 OP2_7 6 8 151)
(sysctrl diswdtm diswdt OP1_10 OP2_5 5 10 165)
(sysctrl enwdtm enwdt OP1_8 OP2_5 7 10 133)
(sysctrl einitm einit OP1_11 OP2_5 4 10 181)
(sysctrl srvwdtm srvwdt OP1_10 OP2_7 5 8 167 )
;s/w brk
; SBRK
(dni sbrk "sbrk"
((PIPE OS) (IDOC MISC))
"sbrk"
(+ OP1_8 OP2_12 (f-op-bit8 0))
(???) <<<
()
)
;prioritize register
;PRIOR Rwn,Rwm
(dni prior "add registers"
((PIPE OS) (IDOC ALU))
"prior $dr,$sr"
(+ OP1_2 OP2_11 dr sr)
(sequence ((HI count) (HI tmp1) (HI tmp2))
(set HI count (const 0))
(set HI tmp1 sr)
(set HI tmp2 (and tmp1 (const 32768)))
>> (cond HI
>> ((ne HI tmp2 (const 1)) (ne HI sr (const 0))
>> (sll HI tmp1 (const 1))
>> (set HI tmp2 (and tmp1 (const 32768)))
>> (set HI count (add HI count (const 1)))
>> )
>> )
(set HI dr count)
)
()
)