Re: delayed branches and zero overhead loops

[Dave Brolley <brolley at redhat dot com>]

Joern Rennecke wrote:
> On Wed, Feb 14, 2007 at 02:51:50PM -0500, Dave Brolley wrote:
>   
> > Joern Rennecke wrote:
> >     
> > > That is indeed the case.  The only format differences are in the
> > > RC-ilink / RC-noilink operand and in the F0 / F1F operand.
> > >
> > >
> > >       
> > If so, then there must be more bits which are constant in each of the 
> > two forms of the insn, otherwise, how does the hardware decode them?
> >     
>
> ilink1 is core register 29, ilink2 is core register 30 .
> Thus, you could describe the upper four bits of RC-ilink as 7,
> but that would still not disambiguate it from RC-noilink for core registers
> 28 and 31.
>   
I would merge the two insns into one and handle the difference in the 
semantic code by checking (index-of <operand>)
>   
> > > It's the same situation with long immediates.  They are indicated by a
> > > special value in any one of three operand fields.
> > >       
This could be handled in the same way by checking the values of the 
immediate operands.

Dave