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sim: Handle and pass new required option -OPC for CGEN "desc".


Most CGEN-based simulators use the <target>-desc.h file from
opcodes (and by most, I mean two out of the total three), see
sim/m32r/Makefile.in and sim/frv/Makefile.in.  When the CGEN
option "-OPC" was introduced for generating that file, the CGEN
caller in opcodes was updated, but the one in sim wasn't.  So
i960 broke.  To repeat, build sim --target=i960-elf
--enable-cgen-maint or go to build/sim/i960 and make
"stamp-desc" (may need to "rm stamp-desc" or "touch
cgen/cpu/i960.cpu").  You'll see:

make cgen-desc CGEN=`if [ -f ../../guile/libguile/guile ]; then echo ../../guile/libguile/guile; else echo guile ; fi` CGENFLAGS="-v" \
  cpu=i960 mach=all \
  archfile=/n/asic/slask/hp/simtest/src/sim/i960/../../cgen/cpu/i960.cpu
make[1]: Entering directory `/n/asic_slask/hp/simtest/srcobji960/sim/i960'
/bin/sh /n/asic/slask/hp/simtest/src/sim/i960/../common/cgen.sh desc /n/asic/slask/hp/simtest/src/sim/i960 \
guile /n/asic/slask/hp/simtest/src/sim/i960/../../cgen "-v" \
	i960 "" i960 "" all "" \
	/n/asic/slask/hp/simtest/src/sim/i960/../../cgen/cpu/i960.cpu ignored
Skipping slib/sort, already loaded.
Skipping slib/random, already loaded.
No backtrace available.
cgen -s /n/asic/slask/hp/simtest/src/sim/i960/../../cgen/cgen-opc.scm -s /n/asic/slask/hp/simtest/src/sim/i960/../../cgen -v -f  -m all -a /n/asic/slask/hp/simtest/src/sim/i960/../../cgen/cpu/i960.cpu -i all -H tmp-desc.h1 -C tmp-desc.c1 -O tmp-opc.h1 
Loading cpu description /n/asic/slask/hp/simtest/src/sim/i960/../../cgen/cpu/i960.cpu
Including file simplify.inc ...
Analyzing instruction set ...
Done analysis.
Generating i960 desc.h ...
ERROR: .opc file unspecified, missing -OPC argument
make[1]: *** [cgen-desc] Error 1

Fixed by adjusting the desc-related machinery to handle both
explicit and defaulted .opc file.  The following was committed
as obvious, after testing by "make stamp-desc" in sim/i960 (has
an opcfile cgen/cpu/i960.opc) and the wip sim/cris (no opcfile,
defaults to /dev/null) and building the simulators.  I didn't
commit the regenerated sim/i960 files, because they obviously
haven't been regenerated since CGEN was last modified and
they're too different from the version in CVS for me to decide
whether the changes are benevolent, and there's no testsuite for
it trigged by "make check-sim". :-(  I also updated copyright
year for Make-common.in, but that's not shown in this patch.

sim/common:
	* cgen.sh: New thirteenth parameter opcfile, defaulting to
	/dev/null.
	<case desc>: Pass -OPC opcfile.
	* Make-common.in (cgen-desc): Pass $(opcfile) as thirteenth
	parameter to cgen.sh.

sim/i960:
	* Makefile.in (stamp-desc): Specify opcfile.


Index: Make-common.in
===================================================================
RCS file: /cvs/src/src/sim/common/Make-common.in,v
retrieving revision 1.16
diff -c -p -r1.16 Make-common.in
*** Make-common.in	30 Nov 2004 13:44:13 -0000	1.16
--- Make-common.in	1 Dec 2004 00:54:00 -0000
*************** cgen-desc: force
*** 739,744 ****
  	$(SHELL) $(srccom)/cgen.sh desc $(srcdir) \
  		$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
  		$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
! 		$(archfile) ignored
  
  ## End COMMON_POST_CONFIG_FRAG
--- 739,744 ----
  	$(SHELL) $(srccom)/cgen.sh desc $(srcdir) \
  		$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
  		$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
! 		$(archfile) ignored $(opcfile)
  
  ## End COMMON_POST_CONFIG_FRAG
Index: cgen.sh
===================================================================
RCS file: /cvs/src/src/sim/common/cgen.sh,v
retrieving revision 1.5
diff -c -p -r1.5 cgen.sh
*** cgen.sh	8 Sep 2003 17:24:59 -0000	1.5
--- cgen.sh	1 Dec 2004 00:54:00 -0000
***************
*** 3,9 ****
  #
  # Usage: /bin/sh cgen.sh {"arch"|"cpu"|"decode"|"defs"|"cpu-decode"} \
  #	srcdir cgen cgendir cgenflags \
! #	arch archflags cpu mach suffix archfile extrafiles
  #
  # We store the generated files in the source directory until we decide to
  # ship a Scheme interpreter (or other implementation) with gdb/binutils.
--- 3,9 ----
  #
  # Usage: /bin/sh cgen.sh {"arch"|"cpu"|"decode"|"defs"|"cpu-decode"} \
  #	srcdir cgen cgendir cgenflags \
! #	arch archflags cpu mach suffix archfile extrafiles opcfile
  #
  # We store the generated files in the source directory until we decide to
  # ship a Scheme interpreter (or other implementation) with gdb/binutils.
*************** shift ; mach=$9
*** 26,34 ****
--- 26,37 ----
  shift ; suffix=$9
  shift ; archfile=$9
  shift ; extrafiles=$9
+ shift ; opcfile=$9
  
  rootdir=${srcdir}/../..
  
+ test -z "${opcfile}" && opcfile=/dev/null
+ 
  if test -z "$isa" ; then
    isa=all
    prefix=$cpu
*************** desc)
*** 196,201 ****
--- 199,205 ----
  	${cgen} -s ${cgendir}/cgen-opc.scm \
  		-s ${cgendir} \
  		${cgenflags} \
+ 		-OPC ${opcfile} \
  		-f "${archflags}" \
  		-m ${mach} \
  		-a ${archfile} \


Index: Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/i960/Makefile.in,v
retrieving revision 1.5
diff -c -p -r1.5 Makefile.in
*** Makefile.in	8 Sep 2003 17:25:56 -0000	1.5
--- Makefile.in	1 Dec 2004 01:47:54 -0000
***************
*** 1,5 ****
  # Makefile template for Configure for the i960 simulator
! # Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
  # Contributed by Cygnus Support.
  #
  # This file is part of GDB, the GNU debugger.
--- 1,5 ----
  # Makefile template for Configure for the i960 simulator
! # Copyright (C) 1996, 1997, 1998, 1999, 2004 Free Software Foundation, Inc.
  # Contributed by Cygnus Support.
  #
  # This file is part of GDB, the GNU debugger.
*************** stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC
*** 125,130 ****
  		$(CGEN_CPU_DIR)/sparc.cpu $(CGEN_CPU_DIR)/sparccom.cpu $(CGEN_CPU_DIR)/i960.cpu $(CGEN_CPU_DIR)/i960.cpu
  	$(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
  	  cpu=i960 mach=all \
! 	  archfile=$(CGEN_CPU_DIR)/i960.cpu
  	touch stamp-desc
  i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc
--- 125,130 ----
  		$(CGEN_CPU_DIR)/sparc.cpu $(CGEN_CPU_DIR)/sparccom.cpu $(CGEN_CPU_DIR)/i960.cpu $(CGEN_CPU_DIR)/i960.cpu
  	$(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
  	  cpu=i960 mach=all \
! 	  archfile=$(CGEN_CPU_DIR)/i960.cpu opcfile=$(CGEN_CPU_DIR)/i960.opc
  	touch stamp-desc
  i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc

brgds, H-P


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