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[patch] change comment to refer to Renesas.


Renesas Technology Corp. is a new semiconductor company, established on
April 1st, 2003, as a joint venture between Hitachi, Ltd.(TSE: 6501) and
Mitsubishi Electric Corporation(TSE: 6503).

M32R Information:
http://www.renesas.com/eng/products/mpumcu/32bit/m32r/index.html

ChangeLog

2003-06-09 Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >
    *NEWS: Change comment to refer to Rrenesas

diff -r -cp
/home/inaoka/rso/maintainer/work_src/cgen/snapshot-20030607/org_src/cgen/NEW
S ./cgen/NEWS
***
/home/inaoka/rso/maintainer/work_src/cgen/snapshot-20030607/org_src/cgen/NEW
S Fri Dec 20 11:20:50 2002
--- ./cgen/NEWS Mon Jun  9 16:32:05 2003
*************** generators. A handful of CPU description
*** 13,17 ****
   * Intel i960 [incomplete]
   * Intel IA-32 and IA-64 [incomplete]
   * Fujitsu FR-30
!  * Mitsubishi M32R/D
   * SPARC [incomplete]
--- 13,17 ----
   * Intel i960 [incomplete]
   * Intel IA-32 and IA-64 [incomplete]
   * Fujitsu FR-30
!  * Renesas M32R/D
   * SPARC [incomplete]ChangeLog

cgen/ChangeLog
2003-06-09 Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >
    *cpu/m32r.cpu : Change comment to refer to Rrenesas
      doc/rtl.texi : Ditto

diff -r -cp
/home/inaoka/rso/maintainer/work_src/cgen/snapshot-20030607/org_src/cgen/cpu
/m32r.cpu ./cgen/cpu/m32r.cpu
***
/home/inaoka/rso/maintainer/work_src/cgen/snapshot-20030607/org_src/cgen/cpu
/m32r.cpu Thu Jul  5 21:45:47 2001
--- ./cgen/cpu/m32r.cpu Mon Jun  9 16:30:59 2003
***************
*** 1,4 ****
! ; Mitsubishi M32R CPU description.  -*- Scheme -*-
  ; Copyright (C) 2000 Red Hat, Inc.
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
--- 1,4 ----
! ; Renesas M32R CPU description.  -*- Scheme -*-
  ; Copyright (C) 2000 Red Hat, Inc.
  ; This file is part of CGEN.
  ; See file COPYING.CGEN for details.
***************
*** 12,18 ****

  (define-arch
    (name m32r) ; name of cpu family
!   (comment "Mitsubishi M32R")
    (default-alignment aligned)
    (insn-lsb0? #f)
    (machs m32r m32rx)
--- 12,18 ----

  (define-arch
    (name m32r) ; name of cpu family
!   (comment "Renesas M32R")
    (default-alignment aligned)
    (insn-lsb0? #f)
    (machs m32r m32rx)
***************
*** 138,144 ****
    ; The "b" suffix stands for "base" and is the convention.
    ; The "f" suffix stands for "family" and is the convention.
    (name m32rbf)
!   (comment "Mitsubishi M32R base family")
    (endian big)
    (word-bitsize 32)
    ; Override isa spec (??? keeps things simpler, though it was more true
--- 138,144 ----
    ; The "b" suffix stands for "base" and is the convention.
    ; The "f" suffix stands for "family" and is the convention.
    (name m32rbf)
!   (comment "Renesas M32R base family")
    (endian big)
    (word-bitsize 32)
    ; Override isa spec (??? keeps things simpler, though it was more true
***************
*** 148,154 ****

  (define-cpu
    (name m32rxf)
!   (comment "Mitsubishi M32Rx family")
    (endian big)
    (word-bitsize 32)
    ; Generated files have an "x" suffix.
--- 148,154 ----

  (define-cpu
    (name m32rxf)
!   (comment "Renesas M32Rx family")
    (endian big)
    (word-bitsize 32)
    ; Generated files have an "x" suffix.
diff -r -cp
/home/inaoka/rso/maintainer/work_src/cgen/snapshot-20030607/org_src/cgen/doc
/rtl.texi ./cgen/doc/rtl.texi
***
/home/inaoka/rso/maintainer/work_src/cgen/snapshot-20030607/org_src/cgen/doc
/rtl.texi Mon May 12 05:06:20 2003
--- ./cgen/doc/rtl.texi Mon Jun  9 16:37:57 2003
*************** The syntax of @code{define-arch} is:
*** 340,346 ****
  @example
  (define-arch
    (name architecture-name) ; e.g. m32r
!   (comment "description")  ; e.g. "Mitsubishi M32R"
    (attrs attribute-list)
    (default-alignment aligned|unaligned|forced)
    (insn-lsb0? #f|#t)
--- 340,346 ----
  @example
  (define-arch
    (name architecture-name) ; e.g. m32r
!   (comment "description")  ; e.g. "Renesas M32R"
    (attrs attribute-list)
    (default-alignment aligned|unaligned|forced)
    (insn-lsb0? #f|#t)


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