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opcode bits beyond base-insn-bitsize


I found this fixme in xstormy16.cpu.

(define-isa
  (name xstormy16)
  (comment "Xstormy16 instruction set")
  (default-insn-word-bitsize 32)
  (default-insn-bitsize 32)
  ; FIXME base-insn-bitsize should be 16 too, but at present CGEN has
  ; no support for instruction sets with opcode bits past
  ; base-insn-bitsize, so we must set it to at least 20.
  (base-insn-bitsize 32)
)

Can anyone remember what the details are?
i.e. what didn't work?  assembler? disassembler? simulator?


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