Re: [PATCH] RISC-V: Add satp as an alias for sptbr

[Palmer Dabbelt <palmer at sifive dot com>]

Committed.

On Mon, 06 Nov 2017 13:57:24 PST (-0800), Palmer Dabbelt wrote:
> The RISC-V privileged ISA changed the name of sptbr (Supervisor Page
> Table Base Register) to satp (Supervisor Address Translation and
> Protection) to reflect the fact it could be used for more than just
> paging.  This patch adds an alias, as they're the same register.
>
> include/ChangeLog
>
> 2017-11-06  Palmer Dabbelt  <palmer@dabbelt.com>
>
>         * opcode/riscv-opc.h (sptbr): Rename to satp.
>         (CSR_SPTBR): Rename to CSR_SATP.
>         (sptbr): Alias to CSR_SATP.
>
> gas/ChangeLog
>
> 2017-11-06  Palmer Dabbelt  <palmer@dabbelt.com>
>
>         * testsuite/gas/riscv/satp.d: New test.
>         testsuite/gas/riscv/satp.s: Likewise.
>         testsuite/gas/riscv/riscv.exp: Likewise.
>         config/tc-riscv.c (md_begin): Handle CSR aliases.
> ---
>  gas/config/tc-riscv.c             |  1 +
>  gas/testsuite/gas/riscv/riscv.exp |  1 +
>  gas/testsuite/gas/riscv/satp.d    | 11 +++++++++++
>  gas/testsuite/gas/riscv/satp.s    |  3 +++
>  include/opcode/riscv-opc.h        |  7 +++++--
>  5 files changed, 21 insertions(+), 2 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/satp.d
>  create mode 100644 gas/testsuite/gas/riscv/satp.s
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index f4276c9fb5eb..c8955a69ecd1 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -643,6 +643,7 @@ md_begin (void)
>    hash_reg_names (RCLASS_FPR, riscv_fpr_names_abi, NFPR);
>
>  #define DECLARE_CSR(name, num) hash_reg_name (RCLASS_CSR, #name, num);
> +#define DECLARE_CSR_ALIAS(name, num) DECLARE_CSR(name, num);
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>
> diff --git a/gas/testsuite/gas/riscv/riscv.exp b/gas/testsuite/gas/riscv/riscv.exp
> index b2eaec1f5750..2ab885ad87a1 100644
> --- a/gas/testsuite/gas/riscv/riscv.exp
> +++ b/gas/testsuite/gas/riscv/riscv.exp
> @@ -24,4 +24,5 @@ if [istarget riscv*-*-*] {
>      run_dump_test "c-lui-fail"
>      run_dump_test "c-addi4spn-fail"
>      run_dump_test "c-addi16sp-fail"
> +    run_dump_test "satp"
>  }
> diff --git a/gas/testsuite/gas/riscv/satp.d b/gas/testsuite/gas/riscv/satp.d
> new file mode 100644
> index 000000000000..823601c77343
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/satp.d
> @@ -0,0 +1,11 @@
> +#as:
> +#objdump: -dr
> +
> +.*:[ 	]+file format .*
> +
> +
> +Disassembly of section .text:
> +
> +0+000 <target>:
> +[ 	]+0:[ 	]+180022f3[ 	]+csrr[ 	]+t0,satp
> +[ 	]+4:[ 	]+180022f3[ 	]+csrr[ 	]+t0,satp
> diff --git a/gas/testsuite/gas/riscv/satp.s b/gas/testsuite/gas/riscv/satp.s
> new file mode 100644
> index 000000000000..f8aa76608f98
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/satp.s
> @@ -0,0 +1,3 @@
> +target:
> +	csrr t0, satp
> +	csrr t0, sptbr
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index b203a6ab1943..ee37d3ff505d 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -611,7 +611,7 @@
>  #define CSR_SCAUSE 0x142
>  #define CSR_SBADADDR 0x143
>  #define CSR_SIP 0x144
> -#define CSR_SPTBR 0x180
> +#define CSR_SATP 0x180
>  #define CSR_MSTATUS 0x300
>  #define CSR_MISA 0x301
>  #define CSR_MEDELEG 0x302
> @@ -1123,7 +1123,7 @@ DECLARE_CSR(sepc, CSR_SEPC)
>  DECLARE_CSR(scause, CSR_SCAUSE)
>  DECLARE_CSR(sbadaddr, CSR_SBADADDR)
>  DECLARE_CSR(sip, CSR_SIP)
> -DECLARE_CSR(sptbr, CSR_SPTBR)
> +DECLARE_CSR(satp, CSR_SATP)
>  DECLARE_CSR(mstatus, CSR_MSTATUS)
>  DECLARE_CSR(misa, CSR_MISA)
>  DECLARE_CSR(medeleg, CSR_MEDELEG)
> @@ -1293,6 +1293,9 @@ DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
>  DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
>  DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
>  #endif
> +#ifdef DECLARE_CSR_ALIAS
> +DECLARE_CSR_ALIAS(sptbr, CSR_SATP)
> +#endif
>  #ifdef DECLARE_CAUSE
>  DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
>  DECLARE_CAUSE("fault fetch", CAUSE_FAULT_FETCH)