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[committed] MIPS16: Fix SP-relative SD instruction annotation
- From: "Maciej W. Rozycki" <macro at imgtec dot com>
- To: <binutils at sourceware dot org>
- Date: Wed, 14 Dec 2016 22:25:28 +0000
- Subject: [committed] MIPS16: Fix SP-relative SD instruction annotation
- Authentication-results: sourceware.org; auth=none
Fix the annotation of SP-relative SD instructions incorrectly marked as
reading from the PC rather than SP, which in turn prevented their 16-bit
forms from being scheduled into jump delay slots. This bug has been
there since forever.
opcodes/
* mips16-opc.c (mips16_opcodes): Set RD_SP rather than RD_PC in
`pinfo2' with SP-relative "sd" entries.
gas/
* testsuite/gas/mips/mips16-sprel-swap.d: New test.
* testsuite/gas/mips/mips16-sprel-swap.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
---
No regressions with the usual MIPS test targets. Committed.
Maciej
binutils-mips16-opcodes-sdsp-rdsp.diff
Index: binutils/gas/testsuite/gas/mips/mips.exp
===================================================================
--- binutils.orig/gas/testsuite/gas/mips/mips.exp 2016-12-13 21:22:55.269710479 +0000
+++ binutils/gas/testsuite/gas/mips/mips.exp 2016-12-13 21:23:16.625125794 +0000
@@ -1296,6 +1296,7 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test "mips16e-64" "-march=mips32 -32"
run_dump_test "mips16-intermix"
run_dump_test "mips16-extend"
+ run_dump_test "mips16-sprel-swap"
run_dump_test "vxworks1"
run_dump_test "vxworks1-xgot"
Index: binutils/gas/testsuite/gas/mips/mips16-sprel-swap.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/gas/testsuite/gas/mips/mips16-sprel-swap.d 2016-12-13 21:23:16.676907655 +0000
@@ -0,0 +1,20 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS16 jump delay slot scheduling for SP-relative instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> eb00 jr v1
+[0-9a-f]+ <[^>]*> d204 sw v0,16\(sp\)
+[0-9a-f]+ <[^>]*> eb00 jr v1
+[0-9a-f]+ <[^>]*> 6206 sw ra,24\(sp\)
+[0-9a-f]+ <[^>]*> eb00 jr v1
+[0-9a-f]+ <[^>]*> f944 sd v0,32\(sp\)
+[0-9a-f]+ <[^>]*> eb00 jr v1
+[0-9a-f]+ <[^>]*> fa05 sd ra,40\(sp\)
+[0-9a-f]+ <[^>]*> eb00 jr v1
+[0-9a-f]+ <[^>]*> 920c lw v0,48\(sp\)
+[0-9a-f]+ <[^>]*> eb00 jr v1
+[0-9a-f]+ <[^>]*> f847 ld v0,56\(sp\)
+ \.\.\.
Index: binutils/gas/testsuite/gas/mips/mips16-sprel-swap.s
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/gas/testsuite/gas/mips/mips16-sprel-swap.s 2016-12-13 21:23:16.684986874 +0000
@@ -0,0 +1,24 @@
+ .module mips3
+ .set mips16
+foo:
+ sw $2, 0x10($29)
+ jr $3
+
+ sw $31, 0x18($29)
+ jr $3
+
+ sd $2, 0x20($29)
+ jr $3
+
+ sd $31, 0x28($29)
+ jr $3
+
+ lw $2, 0x30($29)
+ jr $3
+
+ ld $2, 0x38($29)
+ jr $3
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
Index: binutils/opcodes/mips16-opc.c
===================================================================
--- binutils.orig/opcodes/mips16-opc.c 2016-12-13 21:21:29.300900908 +0000
+++ binutils/opcodes/mips16-opc.c 2016-12-13 21:23:09.199493184 +0000
@@ -321,8 +321,8 @@ const struct mips_opcode mips16_opcodes[
{"remu", "z,v,y", 0, (int) M_REMU_3, INSN_MACRO, 0, I1, 0, 0 },
{"sb", "y,5(x)", 0xc000, 0xf800, RD_1|RD_3, 0, I1, 0, 0 },
{"sd", "y,D(x)", 0x7800, 0xf800, RD_1|RD_3, 0, I3, 0, 0 },
-{"sd", "y,D(S)", 0xf900, 0xff00, RD_1, RD_PC, I3, 0, 0 },
-{"sd", "R,C(S)", 0xfa00, 0xff00, 0, RD_31|RD_PC, I1, 0, 0 },
+{"sd", "y,D(S)", 0xf900, 0xff00, RD_1, RD_SP, I3, 0, 0 },
+{"sd", "R,C(S)", 0xfa00, 0xff00, 0, RD_31|RD_SP, I1, 0, 0 },
{"sh", "y,H(x)", 0xc800, 0xf800, RD_1|RD_3, 0, I1, 0, 0 },
{"sllv", "y,x", 0xe804, 0xf81f, MOD_1|RD_2, 0, I1, 0, 0 },
{"sll", "x,w,<", 0x3000, 0xf803, WR_1|RD_2, 0, I1, 0, 0 },