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Re: [PATCH] Fix the incorrect assembling for ppc wait mnemonic
- From: Alan Modra <amodra at gmail dot com>
- To: Zavier Luo <zavier dot luo at gmail dot com>
- Cc: Peter Bergner <bergner at vnet dot ibm dot com>, binutils at sourceware dot org, Scott Wood <scott dot wood at nxp dot com>
- Date: Tue, 5 Jul 2016 10:30:57 +0930
- Subject: Re: [PATCH] Fix the incorrect assembling for ppc wait mnemonic
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On Sun, Jul 03, 2016 at 09:37:23AM +0800, Zavier Luo wrote:
> I still have some different thought of the default setting of -mcpu.
> -mcpu=powerpc64 should *not* mean "latest server cpu"
It doesn't (and you're talking about a "gcc" option, not an "as" one).
What does happen is that in the absence of any -mcpu selection your
gcc is probably passing no -m<cpu> option to the assembler but is
passing -many. The mnemonic "wait" and its variants are not enabled
by the default assembler cpu (-mppc), and there are now two different
opcodes for "wait", the power9 one with major opcode 31, xop 30, and
the e500mc/a2 one with major opcode 31, xop 62. The power9 version
of "wait" thus appears in the opcode table first and is therefore the
opcode emitted when using just -many.
>(and that's a
> lousy default as well when -mcpu is not specified),
It is easy to change the default set of options passed from "gcc" to
"as". You should investigate how to do that (hint, start at rs6000.h
ASM_CPU_SPEC), or if you cannot do that yourself, complain to whomever
supplied your version of gcc. This problem ought to be fixed in gcc,
and preferably be submitted to the gcc project to benefit other e500mc
>and even if we had
> specified -mcpu=power9 (or whatever) why is it producing the waitasec
> opcode in response to a plain "wait" mnemonic?
"waitasec" is "wait 0".
Australia Development Lab, IBM