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[0/2 PATCH][ARM] Purecode


After some consideration we decided to rethink the ARM
processor-specific ELF section attribute SHF_ARM_NOREAD. The
functionality we aimed to enable with it does not require the section to
be unreadable, instead we aim at the separation of code and data. For
that reason we introduced a new processor-specific ELF section attribute
called SHF_ARM_PURECODE. This attribute indicates a section only
contains instructions and no data, this has beneficial consequences for
many low-cost micro-controllers that implement low-power on-chip
non-volatile memory which has low access speed. For more on PureCode
read the "Whitepaper - Separating instructions and data with PureCode",
available at The ELF for ARM
Architecture document will be updated to reflect these changes.

This patch series implements support for this new attribute for
M-profile targets that implement the movw instruction. Support for other
arm targets could be added later.

Tested binutils and ld regressions.

(2) Andre Vieira
Change noread to purecode
Purecode compatible long branch veneer for M-profile targets with movw


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