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Re: [PATCH] x86/Intel: don't accept bogus instructions
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Jan Beulich <JBeulich at suse dot com>
- Cc: Binutils <binutils at sourceware dot org>
- Date: Thu, 30 Jun 2016 05:24:33 -0700
- Subject: Re: [PATCH] x86/Intel: don't accept bogus instructions
- Authentication-results: sourceware.org; auth=none
- References: <577511DA02000078000FA074 at prv-mh dot provo dot novell dot com> <CAMe9rOqi2N9WxrPsxJV+457nvBrG_c1VYC31aRWhmVnjgi4kTQ at mail dot gmail dot com> <577520C202000078000FA0ED at prv-mh dot provo dot novell dot com> <CAMe9rOqT-2JMkzA6jtBprX-mbYKjEBBxNTmh4KbEaW-K4qVrsw at mail dot gmail dot com> <5775258402000078000FA13B at prv-mh dot provo dot novell dot com> <CAMe9rOot7Zo1yzeD4UFiiR9Cc+_Q7_UsOMqrf3tj2KCzpHCBDQ at mail dot gmail dot com> <5775298302000078000FA172 at prv-mh dot provo dot novell dot com>
On Thu, Jun 30, 2016 at 5:15 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 30.06.16 at 14:07, <hjl.tools@gmail.com> wrote:
>> On Thu, Jun 30, 2016 at 4:58 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>> On 30.06.16 at 13:50, <hjl.tools@gmail.com> wrote:
>>>> On Thu, Jun 30, 2016 at 4:38 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>>>> On 30.06.16 at 13:18, <hjl.tools@gmail.com> wrote:
>>>>>> On Thu, Jun 30, 2016 at 3:34 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>>> ... due to their last byte looking like a suffix, when after its
>>>>>>> stripping a matching instruction can be found. Since memory operand
>>>>>>> size specifiers in Intel mode get converted into suffix representation
>>>>>>> internally, we need to keep track of the actual mnemonic suffix which
>>>>>>> may have got trimmed off, and check its validity while looking for a
>>>>>>> matching template. I tripper over this quite some time again after
>>>>>>> support for AMD's SSE5 instructions got removed, as at that point some
>>>>>>> of the SSE5 mnemonics, other than expected, didn't fail to assemble.
>>>>>>> But the problem affects many more instructions, namely (almost) all
>>>>>>> MMX, SSE, and AVX ones as it looks. I don't think it makes sense to
>>>>>>> add a testcase covering all of them, nor do I think it makes sense to
>>>>>>> pick out some random examples for a new test case.
>>>>>>
>>>>>> Please open a bug report to show there is a problem.
>>>>>
>>>>> I don't see the point, but anyway: 20318.
>>>>
>>>> Please add this testcase:
>>>>
>>>> .text
>>>> phadddb %xmm0, %xmm1
>>>> phadddd %xmm0, %xmm1
>>>> phadddl %xmm0, %xmm1
>>>> phadddld %xmm0, %xmm1
>>>> phadddq %xmm0, %xmm1
>>>> phaddds %xmm0, %xmm1
>>>> phadddw %xmm0, %xmm1
>>>> .intel_syntax noprefix
>>>> phadddb xmm0, xmm1
>>>> phadddd xmm0, xmm1
>>>> phadddl xmm0, xmm1
>>>> phadddld xmm0, xmm1
>>>> phadddq xmm0, xmm1
>>>> phaddds xmm0, xmm1
>>>> phadddw xmm0, xmm1
>>>>
>>>> to your patch and run it with both --32 and --64. All of them should fail.
>>>
>>> To quote the original submission: "I don't think it makes sense to add
>>> a testcase covering all of them, nor do I think it makes sense to pick
>>> out some random examples for a new test case."
>>>
>>> What good does such a limited test case do? If anything, someone
>>> should sit down and write a script to machine generate a list of all
>>> mnemonics with invalid suffixes.
>>
>> Without a testcase, your change looks like random change to me.
>
> Sigh.
>
>> For all I know, you change doesn't make those instructions error.
>
> Of course it does - that's the whole point.
Please show me with a testcase.
--
H.J.