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Re: [PATCH] Fix the incorrect assembling for ppc wait mnemonic
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: Zavier Luo <zavier dot luo at gmail dot com>
- Cc: binutils at sourceware dot org
- Date: Mon, 20 Jun 2016 09:05:43 -0500
- Subject: Re: [PATCH] Fix the incorrect assembling for ppc wait mnemonic
- Authentication-results: sourceware.org; auth=none
- References: <1466409386-12860-1-git-send-email-zavier dot luo at gmail dot com>
On 6/20/16 2:56 AM, Zavier Luo wrote:
> The wait mnemonic for ppc targets is incorrectly assembled due to
> duplicated address definition with waitasec instruction. The issue causes
> kernel boot calltrace for ppc targets when wait instruction is executed.
This is incorrect for POWER9. POWER9's wait instruction really does have
a secondary opcode of "30".
Can you explain the problem you're trying to solve? Hopefully with
a small asm test case and assembler options you're using that shows