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Re: [committd, PATCH] Correct CpuMax in i386-opc.h


On Fri, May 27, 2016 at 6:57 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> CpuMax should be CpuIntel64, not CpuNo64.  i386-gen.c is updated to
> verify that CpuMax is correct.  X86 assembler is updated to properly
> set cpuamd64 and cpuintel64.
>
> gas/
>
>         PR gas/20154
>         * config/tc-i386.c (intel64): New.
>         (cpu_flags_match): Set cpuamd64 and cpuintel64.
>         (md_parse_option): Set intel64 instead of cpuamd64 and
>         cpuintel64.
>
> opcodes/
>
>         PR gas/20154
>         * i386-gen.c (main): Fail if CpuMax is incorrect.
>         * i386-opc.h (CpuMax): Set to CpuIntel64.
>         * i386-tbl.h: Regenerated.
> ---

I checked in this patch to replace CpuAMD64/CpuIntel64 with
AMD64/Intel64.

-- 
H.J.
From b790dd841031cd500b6894cb5cbe5186f9e8018d Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Fri, 27 May 2016 07:51:56 -0700
Subject: [PATCH] Replace CpuAMD64/CpuIntel64 with AMD64/Intel64

AMD64 vs CpuIntel64 ISA should be handled similar as AT&T vs Intel
syntax.  Since cpu_flags isn't sorted by position, we need to check
the whole cpu_flags array for the maximum position when verifying
CpuMax.

gas/

	PR gas/20154
	* config/tc-i386.c (cpu_flags_match): Don't set cpuamd64 nor
	cpuintel64.
	(match_template): Check Intel64/AMD64 ISA.

opcodes/

	PR gas/20154
	* i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
	(opcode_modifiers): Add AMD64 and Intel64.
	(main): Properly verify CpuMax.
	* i386-opc.h (CpuAMD64): Removed.
	(CpuIntel64): Likewise.
	(CpuMax): Set to CpuNo64.
	(i386_cpu_flags): Remove cpuamd64 and cpuintel64.
	(AMD64): New.
	(Intel64): Likewise.
	(i386_opcode_modifier): Add amd64 and intel64.
	(i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
	on call and jmp.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
---
 gas/config/tc-i386.c |    11 +-
 opcodes/i386-gen.c   |    22 +-
 opcodes/i386-init.h  |   220 +-
 opcodes/i386-opc.h   |    14 +-
 opcodes/i386-opc.tbl |     8 +-
 opcodes/i386-tbl.h   | 20804 ++++++++++++++++++++++++-------------------------
 6 files changed, 10540 insertions(+), 10539 deletions(-)

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index f8a3bf0..8358740 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1541,11 +1541,6 @@ cpu_flags_match (const insn_template *t)
       /* This instruction is available only on some archs.  */
       i386_cpu_flags cpu = cpu_arch_flags;
 
-      /* Set cpuamd64 and cpuintel64 here since they may be changed by
-	 set_cpu_arch.  */
-      cpu_arch_flags.bitfield.cpuamd64 = !intel64;
-      cpu_arch_flags.bitfield.cpuintel64 = intel64;
-
       cpu = cpu_flags_and (x, cpu);
       if (!cpu_flags_all_zero (&cpu))
 	{
@@ -4766,10 +4761,12 @@ match_template (void)
       if (intel_mnemonic && t->opcode_modifier.attmnemonic)
 	continue;
 
-      /* Check AT&T/Intel syntax.   */
+      /* Check AT&T/Intel syntax and Intel64/AMD64 ISA.   */
       i.error = unsupported_syntax;
       if ((intel_syntax && t->opcode_modifier.attsyntax)
-	  || (!intel_syntax && t->opcode_modifier.intelsyntax))
+	  || (!intel_syntax && t->opcode_modifier.intelsyntax)
+	  || (intel64 && t->opcode_modifier.amd64)
+	  || (!intel64 && t->opcode_modifier.intel64))
 	continue;
 
       /* Check the suffix, except for some instructions in intel mode.  */
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 0afdc90..a935024 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -469,8 +469,6 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuCLZERO),
   BITFIELD (CpuOSPKE),
   BITFIELD (CpuRDPID),
-  BITFIELD (CpuAMD64),
-  BITFIELD (CpuIntel64),
 #ifdef CpuUnused
   BITFIELD (CpuUnused),
 #endif
@@ -540,6 +538,8 @@ static bitfield opcode_modifiers[] =
   BITFIELD (ATTMnemonic),
   BITFIELD (ATTSyntax),
   BITFIELD (IntelSyntax),
+  BITFIELD (AMD64),
+  BITFIELD (Intel64),
 };
 
 static bitfield operand_types[] =
@@ -1344,6 +1344,7 @@ main (int argc, char **argv)
   extern int chdir (char *);
   char *srcdir = NULL;
   int c;
+  unsigned int i, cpumax;
   FILE *table;
 
   program_name = *argv;
@@ -1378,16 +1379,19 @@ main (int argc, char **argv)
       fail (_("unable to change directory to \"%s\", errno = %s\n"),
 	    srcdir, xstrerror (errno));
 
+  /* cpu_flags isn't sorted by position.  */
+  cpumax = 0;
+  for (i = 0; i < ARRAY_SIZE (cpu_flags); i++)
+    if (cpu_flags[i].position > cpumax)
+      cpumax = cpu_flags[i].position;
+
   /* Check the unused bitfield in i386_cpu_flags.  */
 #ifdef CpuUnused
-  if (cpu_flags[ARRAY_SIZE (cpu_flags) - 2].position != CpuMax)
-    fail (_("CpuMax != %d!\n"),
-	  cpu_flags[ARRAY_SIZE (cpu_flags) - 2].position);
-
+  if ((cpumax - 1) != CpuMax)
+    fail (_("CpuMax != %d!\n"), cpumax);
 #else
-  if (cpu_flags[ARRAY_SIZE (cpu_flags) - 1].position != CpuMax)
-    fail (_("CpuMax != %d!\n"),
-	  cpu_flags[ARRAY_SIZE (cpu_flags) - 1].position);
+  if (cpumax != CpuMax)
+    fail (_("CpuMax != %d!\n"), cpumax);
 
   c = CpuNumOfBits - CpuMax - 1;
   if (c)
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 0782b1a..d01657c 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -206,12 +206,8 @@ enum
   Cpu64,
   /* Not supported in the 64bit mode  */
   CpuNo64,
-  /* AMD64 support required  */
-  CpuAMD64,
-  /* Intel64 support required  */
-  CpuIntel64,
   /* The last bitfield in i386_cpu_flags.  */
-  CpuMax = CpuIntel64
+  CpuMax = CpuNo64
 };
 
 #define CpuNumOfUints \
@@ -316,8 +312,6 @@ typedef union i386_cpu_flags
       unsigned int cpurdpid:1;
       unsigned int cpu64:1;
       unsigned int cpuno64:1;
-      unsigned int cpuamd64:1;
-      unsigned int cpuintel64:1;
 #ifdef CpuUnused
       unsigned int unused:(CpuNumOfBits - CpuUnused);
 #endif
@@ -558,6 +552,10 @@ enum
   ATTSyntax,
   /* Intel syntax.  */
   IntelSyntax,
+  /* AMD64.  */
+  AMD64,
+  /* Intel64.  */
+  Intel64,
   /* The last bitfield in i386_opcode_modifier.  */
   Opcode_Modifier_Max
 };
@@ -626,6 +624,8 @@ typedef struct i386_opcode_modifier
   unsigned int attmnemonic:1;
   unsigned int attsyntax:1;
   unsigned int intelsyntax:1;
+  unsigned int amd64:1;
+  unsigned int intel64:1;
 } i386_opcode_modifier;
 
 /* Position of operand_type bits.  */
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 6a87528..66b28e5 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -319,8 +319,8 @@ shrd, 2, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, {
 
 // Control transfer instructions.
 call, 1, 0xe8, None, 1, CpuNo64, JumpDword|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp16|Disp32 }
-call, 1, 0xe8, None, 1, Cpu64|CpuAMD64, JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32S }
-call, 1, 0xe8, None, 1, Cpu64|CpuIntel64, JumpDword|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp32S }
+call, 1, 0xe8, None, 1, Cpu64, AMD64|JumpDword|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp16|Disp32S }
+call, 1, 0xe8, None, 1, Cpu64, Intel64|JumpDword|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Disp32S }
 call, 1, 0xff, 0x2, 1, CpuNo64, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|JumpAbsolute }
 call, 1, 0xff, 0x2, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S|JumpAbsolute }
 // Intel Syntax
@@ -331,8 +331,8 @@ lcall, 2, 0x9a, None, 1, CpuNo64, JumpInterSegment|DefaultSize|No_bSuf|No_sSuf|N
 lcall, 1, 0xff, 0x3, 1, 0, Modrm|DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
 
 jmp, 1, 0xeb, None, 1, CpuNo64, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32|Disp32S }
-jmp, 1, 0xeb, None, 1, Cpu64|CpuAMD64, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32S }
-jmp, 1, 0xeb, None, 1, Cpu64|CpuIntel64, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp32S }
+jmp, 1, 0xeb, None, 1, Cpu64, AMD64|Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32S }
+jmp, 1, 0xeb, None, 1, Cpu64, Intel64|Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp32S }
 jmp, 1, 0xff, 0x4, 1, CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Reg16|Reg32|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|JumpAbsolute }
 jmp, 1, 0xff, 0x4, 1, Cpu64, Modrm|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|BNDPrefixOk, { Reg16|Reg64|Word|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S|JumpAbsolute }
 // Intel Syntax.

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