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[PATCH ARC 1/1] Obvious patch to rename "class" named attributes not to conflict with c++ keyword
- From: Cupertino Miranda <Cupertino dot Miranda at synopsys dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: Claudiu Zissulescu <Claudiu dot Zissulescu at synopsys dot com>, Francois Bedard <Francois dot Bedard at synopsys dot com>
- Date: Thu, 19 May 2016 07:26:58 +0000
- Subject: [PATCH ARC 1/1] Obvious patch to rename "class" named attributes not to conflict with c++ keyword
- Authentication-results: sourceware.org; auth=none
Hi all,
The description describes the patch. ;-)
Although obvious, here is the patch.
Best regards,
Cupertino
gas/ChangeLog:
config/tc-arc.c (attributes_t): Renamed attribute class to
attr_class.
(find_opcode_match, assemble_insn, tokenize_extinsn): Changed.
include/ChangeLog:
opcode/arc.h (struct arc_opcode): Renamed attribute class to
insn_class.
(struct arc_flag_class): Renamed attribute class to flag_class.
opcodes/ChangeLog:
arc-dis.c (find_format, find_format, get_auxreg,
print_insn_arc): Changed.
arc-ext.h (INSERT_XOP): Likewise.
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index b64174f..81d3eb7 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -98,8 +98,8 @@ enum arc_rlx_types
#define is_spfp_p(op) (((sc) == SPX))
#define is_dpfp_p(op) (((sc) == DPX))
#define is_fpuda_p(op) (((sc) == DPA))
-#define is_br_jmp_insn_p(op) (((op)->class == BRANCH || (op)->class == JUMP))
-#define is_kernel_insn_p(op) (((op)->class == KERNEL))
+#define is_br_jmp_insn_p(op) (((op)->insn_class == BRANCH || (op)->insn_class == JUMP))
+#define is_kernel_insn_p(op) (((op)->insn_class == KERNEL))
/* Generic assembler global variables which must be defined by all
targets. */
@@ -323,7 +323,7 @@ typedef struct
{
const char *name;
int len;
- int class;
+ int attr_class;
} attributes_t;
static const attributes_t suffixclass[] =
@@ -1691,7 +1691,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
const char *p;
const struct arc_aux_reg *auxr;
- if (opcode->class != AUXREG)
+ if (opcode->insn_class != AUXREG)
goto de_fault;
p = S_GET_NAME (tok[tokidx].X_add_symbol);
@@ -1845,7 +1845,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
/* Check for extension conditional codes. */
if (ext_condcode.arc_ext_condcode
- && cl_flags->class & F_CLASS_EXTEND)
+ && cl_flags->flag_class & F_CLASS_EXTEND)
{
struct arc_flag_operand *pf = ext_condcode.arc_ext_condcode;
while (pf->name)
@@ -1889,9 +1889,9 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
}
}
- if ((cl_flags->class & F_CLASS_REQUIRED) && cl_matches == 0)
+ if ((cl_flags->flag_class & F_CLASS_REQUIRED) && cl_matches == 0)
goto match_failed;
- if ((cl_flags->class & F_CLASS_OPTIONAL) && cl_matches > 1)
+ if ((cl_flags->flag_class & F_CLASS_OPTIONAL) && cl_matches > 1)
goto match_failed;
}
/* Did I check all the parsed flags? */
@@ -3613,7 +3613,7 @@ assemble_insn (const struct arc_opcode *opcode,
switch (t->X_md)
{
case O_plt:
- if (opcode->class == JUMP)
+ if (opcode->insn_class == JUMP)
as_bad_where (frag_now->fr_file, frag_now->fr_line,
_("Unable to use @plt relocatio for insn %s"),
opcode->name);
@@ -3630,7 +3630,7 @@ assemble_insn (const struct arc_opcode *opcode,
break;
case O_pcl:
reloc = ARC_RELOC_TABLE (t->X_md)->reloc;
- if (ARC_SHORT (opcode->mask) || opcode->class == JUMP)
+ if (ARC_SHORT (opcode->mask) || opcode->insn_class == JUMP)
as_bad_where (frag_now->fr_file, frag_now->fr_line,
_("Unable to use @pcl relocation for insn %s"),
opcode->name);
@@ -4062,7 +4062,7 @@ tokenize_extinsn (extInstruction_t *einsn)
if (!strncmp (suffixclass[i].name, input_line_pointer,
suffixclass[i].len))
{
- suffix_class |= suffixclass[i].class;
+ suffix_class |= suffixclass[i].attr_class;
input_line_pointer += suffixclass[i].len;
break;
}
@@ -4102,7 +4102,7 @@ tokenize_extinsn (extInstruction_t *einsn)
input_line_pointer,
syntaxclassmod[i].len))
{
- syntax_class_modifiers |= syntaxclassmod[i].class;
+ syntax_class_modifiers |= syntaxclassmod[i].attr_class;
input_line_pointer += syntaxclassmod[i].len;
break;
}
@@ -4116,7 +4116,7 @@ tokenize_extinsn (extInstruction_t *einsn)
input_line_pointer,
syntaxclass[i].len))
{
- syntax_class |= syntaxclass[i].class;
+ syntax_class |= syntaxclass[i].attr_class;
input_line_pointer += syntaxclass[i].len;
break;
}
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index d10e311..2e5de9c 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -116,7 +116,7 @@ struct arc_opcode
unsigned cpu;
/* The instruction class. This is used by gdb. */
- insn_class_t class;
+ insn_class_t insn_class;
/* The instruction subclass. */
insn_subclass_t subclass;
@@ -335,7 +335,7 @@ extern const unsigned arc_num_flag_operands;
struct arc_flag_class
{
/* Flag class. */
- flag_class_t class;
+ flag_class_t flag_class;
/* List of valid flags (codes). */
unsigned flags[256];
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 7757ef6..96fd092 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -175,7 +175,7 @@ find_format (const struct arc_opcode *arc_table,
unsigned int value;
/* Check first the extensions. */
- if (cl_flags->class & F_CLASS_EXTEND)
+ if (cl_flags->flag_class & F_CLASS_EXTEND)
{
value = (insn[0] & 0x1F);
if (arcExtMap_condCodeName (value))
@@ -226,7 +226,7 @@ print_flags (const struct arc_opcode *opcode,
const unsigned *flgopridx;
/* Check first the extensions. */
- if (cl_flags->class & F_CLASS_EXTEND)
+ if (cl_flags->flag_class & F_CLASS_EXTEND)
{
const char *name;
value = (insn[0] & 0x1F);
@@ -289,7 +289,7 @@ get_auxreg (const struct arc_opcode *opcode,
unsigned int i;
const struct arc_aux_reg *auxr = &arc_aux_regs[0];
- if (opcode->class != AUXREG)
+ if (opcode->insn_class != AUXREG)
return NULL;
name = arcExtMap_auxRegName (value);
@@ -527,7 +527,7 @@ print_insn_arc (bfd_vma memaddr,
(*info->fprintf_func) (info->stream, "%s", opcode->name);
/* Preselect the insn class. */
- switch (opcode->class)
+ switch (opcode->insn_class)
{
case BRANCH:
case JUMP:
diff --git a/opcodes/arc-ext.h b/opcodes/arc-ext.h
index fcce7e2..e92a350 100644
--- a/opcodes/arc-ext.h
+++ b/opcodes/arc-ext.h
@@ -80,7 +80,7 @@ enum ExtReadWrite
(OP)->opcode = CODE; \
(OP)->mask = MASK; \
(OP)->cpu = CPU; \
- (OP)->class = ARITH; \
+ (OP)->insn_class = ARITH; \
(OP)->subclass = NONE; \
memcpy ((OP)->operands, (ARG), MAX_INSN_ARGS); \
memcpy ((OP)->flags, (FLG), MAX_INSN_FLGS); \