[PATCH] ARM: Add support for thumb1 PCROP relocations.

[mickael guene]

Hi Joseph,

  I have access to the latest draft of IHI0044F. Unfortunately it is not
published yet. Thus, I have attached (to keep formatting as correct as
possible) an excerpt of the table entries related to these relocations.

Regards,

Mickael

On 11/23/2015 11:41 AM, Joseph Myers wrote:
> On Mon, 23 Nov 2015, mickael guene wrote:
>
>> This is why the ARM ABI defines four new relocations that allow
>> symbol address generation in armv6-m architecture using a sequence of
>> movs/adds/lsls instructions.
>
> I don't see these in IHI0044E, which as far as I can see is still the
> current version of AAELF.  Is a new version specifying these relocations
> available somewhere, or could you at least quote the full text / table
> entries relating to these relocations accepted for the next version of
> AAELF?
>
-------------- next part --------------
Code    Name                    Type    Class       Operation
132     R_ARM_THM_ALU_ABS_G0_NC Static  Thumb16     (S + A) | T
133     R_ARM_THM_ALU_ABS_G1_NC Static  Thumb16     S + A
134     R_ARM_THM_ALU_ABS_G2_NC Static  Thumb16     S + A
135     R_ARM_THM_ALU_ABS_G3    Static  Thumb16     S + A


Code    Name                    Overflow    Instruction Result                                  Mask
132     R_ARM_THM_ALU_ABS_G0_NC No          ADD(2)/ADD (immediate, Thumb, 8-bit immediate),     X & 0x000000FF
                                            MOV(1)/MOV (immediate)
133     R_ARM_THM_ALU_ABS_G1_NC No          ADD(2)/ADD (immediate, Thumb, 8-bit immediate),     X & 0x0000FF00
                                            MOV(1)/MOV (immediate)
134     R_ARM_THM_ALU_ABS_G2_NC No          ADD(2)/ADD (immediate, Thumb, 8-bit immediate),     X & 0x00FF0000
                                            MOV(1)/MOV (immediate)
135     R_ARM_THM_ALU_ABS_G3    No          ADD(2)/ADD (immediate, Thumb, 8-bit immediate),     X & 0xFF000000
                                            MOV(1)/MOV (immediate)



Instruction                         REL Addend      Insn modification
ADD(2)/ADD (immediate, Thumb, 8-    insn[7:0]       insn[7:0] = Result_Mask(X) >> (8*n) when
bit immediate),                                     relocated by
MOV(1)/MOV (immediate)                              R_ARM_THM_ALU_ABS_Gn[_NC]